2017-01-18 13:38:39 +00:00
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/**
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******************************************************************************
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* @file stm32f3xx_hal_i2s.c
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* @author MCD Application Team
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* @brief I2S HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the Integrated Interchip Sound (I2S) peripheral:
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* + Initialization and de-initialization functions
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* + IO operation functions
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* + Peripheral State and Errors functions
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@verbatim
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===============================================================================
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##### How to use this driver #####
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===============================================================================
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[..]
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The I2S HAL driver can be used as follows:
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(#) Declare a I2S_HandleTypeDef handle structure.
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(#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
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(##) Enable the SPIx interface clock.
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(##) I2S pins configuration:
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(+++) Enable the clock for the I2S GPIOs.
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(+++) Configure these I2S pins as alternate function pull-up.
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(##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
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and HAL_I2S_Receive_IT() APIs).
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(+++) Configure the I2Sx interrupt priority.
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(+++) Enable the NVIC I2S IRQ handle.
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(##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
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and HAL_I2S_Receive_DMA() APIs:
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(+++) Declare a DMA handle structure for the Tx/Rx channel.
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(+++) Enable the DMAx interface clock.
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(+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
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(+++) Configure the DMA Tx/Rx Channel.
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(+++) Associate the initilalized DMA handle to the I2S DMA Tx/Rx handle.
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(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
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DMA Tx/Rx Channel.
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(#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
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using HAL_I2S_Init() function.
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-@- The specific I2S interrupts (Transmission complete interrupt,
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RXNE interrupt and Error Interrupts) will be managed using the macros
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__HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
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-@- Make sure that either:
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(+@) I2S clock is configured based on SYSCLK or
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(+@) External clock source is configured after setting correctly
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the define constant EXTERNAL_CLOCK_VALUE in the stm32f3xx_hal_conf.h file.
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(#) Three mode of operations are available within this driver :
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*** Polling mode IO operation ***
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=================================
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[..]
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(+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
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(+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
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*** Interrupt mode IO operation ***
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===================================
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[..]
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(+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
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(+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
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add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
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(+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
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add his own code by customization of function pointer HAL_I2S_TxCpltCallback
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(+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
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(+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
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add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
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(+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
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add his own code by customization of function pointer HAL_I2S_RxCpltCallback
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(+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
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add his own code by customization of function pointer HAL_I2S_ErrorCallback
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*** DMA mode IO operation ***
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==============================
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[..]
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(+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
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(+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
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add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
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(+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
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add his own code by customization of function pointer HAL_I2S_TxCpltCallback
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(+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
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(+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
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add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
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(+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
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add his own code by customization of function pointer HAL_I2S_RxCpltCallback
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(+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
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add his own code by customization of function pointer HAL_I2S_ErrorCallback
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(+) Pause the DMA Transfer using HAL_I2S_DMAPause()
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(+) Resume the DMA Transfer using HAL_I2S_DMAResume()
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(+) Stop the DMA Transfer using HAL_I2S_DMAStop()
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*** I2S HAL driver macros list ***
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=============================================
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[..]
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Below the list of most used macros in I2S HAL driver.
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(+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
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(+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
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(+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
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(+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
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(+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
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[..]
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(@) You can refer to the I2S HAL driver header file for more useful macros
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f3xx_hal.h"
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#ifdef HAL_I2S_MODULE_ENABLED
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#if defined(STM32F302xE) || defined(STM32F303xE) || defined(STM32F398xx) || \
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defined(STM32F302xC) || defined(STM32F303xC) || defined(STM32F358xx) || \
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defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || \
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defined(STM32F373xC) || defined(STM32F378xx)
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/** @addtogroup STM32F3xx_HAL_Driver
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* @{
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*/
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/** @defgroup I2S I2S
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* @brief I2S HAL module driver
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/** @defgroup I2S_Private_Functions I2S Private Functions
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* @{
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*/
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static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
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static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
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static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
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static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
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static void I2S_DMAError(DMA_HandleTypeDef *hdma);
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static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
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static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
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static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, uint32_t Timeout);
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/**
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* @}
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*/
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/* Exported functions ---------------------------------------------------------*/
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/** @defgroup I2S_Exported_Functions I2S Exported Functions
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* @{
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*/
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/** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
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* @brief Initialization and Configuration functions
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*
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@verbatim
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===============================================================================
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##### Initialization and de-initialization functions #####
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===============================================================================
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[..] This subsection provides a set of functions allowing to initialize and
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de-initialiaze the I2Sx peripheral in simplex mode:
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(+) User must Implement HAL_I2S_MspInit() function in which he configures
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all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
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(+) Call the function HAL_I2S_Init() to configure the selected device with
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the selected configuration:
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(++) Mode
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(++) Standard
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(++) Data Format
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(++) MCLK Output
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(++) Audio frequency
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(++) Polarity
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(++) Full duplex mode
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(+) Call the function HAL_I2S_DeInit() to restore the default configuration
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of the selected I2Sx periperal.
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@endverbatim
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* @{
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*/
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/**
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* @brief Initializes the I2S according to the specified parameters
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* in the I2S_InitTypeDef and create the associated handle.
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* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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* the configuration information for I2S module
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* @retval HAL status
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*/
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__weak HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hi2s);
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/* Note : This function is defined into this file for library reference. */
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/* Function content is located into file stm32f3xx_hal_i2s_ex.c to */
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/* handle the possible I2S interfaces defined in STM32F3xx devices */
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/* Return error status as not implemented here */
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return HAL_ERROR;
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}
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/**
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* @brief DeInitializes the I2S peripheral
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* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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* the configuration information for I2S module
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
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{
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/* Check the I2S handle allocation */
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if(hi2s == NULL)
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
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hi2s->State = HAL_I2S_STATE_BUSY;
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/* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
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HAL_I2S_MspDeInit(hi2s);
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hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
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hi2s->State = HAL_I2S_STATE_RESET;
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/* Release Lock */
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__HAL_UNLOCK(hi2s);
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return HAL_OK;
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}
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/**
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* @brief I2S MSP Init
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* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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* the configuration information for I2S module
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* @retval None
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*/
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__weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hi2s);
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/* NOTE : This function Should not be modified, when the callback is needed,
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the HAL_I2S_MspInit could be implemented in the user file
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*/
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}
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/**
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* @brief I2S MSP DeInit
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* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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* the configuration information for I2S module
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* @retval None
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*/
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__weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hi2s);
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/* NOTE : This function Should not be modified, when the callback is needed,
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the HAL_I2S_MspDeInit could be implemented in the user file
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*/
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}
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/**
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* @}
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*/
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/** @defgroup I2S_Exported_Functions_Group2 IO operation functions
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* @brief Data transfers functions
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*
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@verbatim
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===============================================================================
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##### IO operation functions #####
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===============================================================================
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[..]
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This subsection provides a set of functions allowing to manage the I2S data
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transfers.
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(#) There are two modes of transfer:
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(++) Blocking mode : The communication is performed in the polling mode.
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The status of all data processing is returned by the same function
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after finishing transfer.
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(++) No-Blocking mode : The communication is performed using Interrupts
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or DMA. These functions return the status of the transfer startup.
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The end of the data processing will be indicated through the
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dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
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using DMA mode.
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(#) Blocking mode functions are :
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(++) HAL_I2S_Transmit()
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(++) HAL_I2S_Receive()
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(#) No-Blocking mode functions with Interrupt are :
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(++) HAL_I2S_Transmit_IT()
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(++) HAL_I2S_Receive_IT()
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(#) No-Blocking mode functions with DMA are :
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(++) HAL_I2S_Transmit_DMA()
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(++) HAL_I2S_Receive_DMA()
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(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
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(++) HAL_I2S_TxCpltCallback()
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(++) HAL_I2S_RxCpltCallback()
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(++) HAL_I2S_ErrorCallback()
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@endverbatim
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* @{
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*/
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/**
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* @brief Transmit an amount of data in blocking mode
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* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
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* the configuration information for I2S module
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2018-03-02 03:34:09 +00:00
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* @param pData a 16-bit pointer to data buffer.
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* @param Size number of data sample to be sent:
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2017-01-18 13:38:39 +00:00
|
|
|
* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
|
|
|
* configuration phase, the Size parameter means the number of 16-bit data length
|
|
|
|
* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
|
|
|
* the Size parameter means the number of 16-bit data length.
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param Timeout Timeout duration
|
2017-01-18 13:38:39 +00:00
|
|
|
* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
|
|
|
* between Master and Slave(example: audio streaming).
|
|
|
|
* @retval HAL status
|
|
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
|
|
|
|
{
|
2018-03-02 03:34:09 +00:00
|
|
|
if((pData == NULL ) || (Size == 0U))
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
return HAL_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
if(hi2s->State == HAL_I2S_STATE_READY)
|
|
|
|
{
|
|
|
|
if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
|
|
|
|
((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
|
|
|
|
{
|
2018-03-02 03:34:09 +00:00
|
|
|
hi2s->TxXferSize = (Size << 1U);
|
|
|
|
hi2s->TxXferCount = (Size << 1U);
|
2017-01-18 13:38:39 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hi2s->TxXferSize = Size;
|
|
|
|
hi2s->TxXferCount = Size;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Process Locked */
|
|
|
|
__HAL_LOCK(hi2s);
|
|
|
|
|
|
|
|
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|
|
|
hi2s->State = HAL_I2S_STATE_BUSY_TX;
|
|
|
|
|
|
|
|
/* Check if the I2S is already enabled */
|
|
|
|
if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
|
|
|
{
|
|
|
|
/* Enable I2S peripheral */
|
|
|
|
__HAL_I2S_ENABLE(hi2s);
|
|
|
|
}
|
|
|
|
|
2018-03-02 03:34:09 +00:00
|
|
|
while(hi2s->TxXferCount > 0U)
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
hi2s->Instance->DR = (*pData++);
|
|
|
|
hi2s->TxXferCount--;
|
|
|
|
/* Wait until TXE flag is set */
|
|
|
|
if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, RESET, Timeout) != HAL_OK)
|
|
|
|
{
|
|
|
|
/* Set the error code and execute error callback*/
|
|
|
|
hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
|
|
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
|
|
return HAL_TIMEOUT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check if an underrun occurs */
|
|
|
|
if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
|
|
|
|
{
|
|
|
|
/* Set the I2S State ready */
|
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
/* Set the error code and execute error callback*/
|
|
|
|
hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
|
|
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
|
|
|
|
|
|
return HAL_ERROR;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
return HAL_BUSY;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Receive an amount of data in blocking mode
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param pData a 16-bit pointer to data buffer.
|
|
|
|
* @param Size number of data sample to be sent:
|
2017-01-18 13:38:39 +00:00
|
|
|
* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
|
|
|
* configuration phase, the Size parameter means the number of 16-bit data length
|
|
|
|
* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
|
|
|
* the Size parameter means the number of 16-bit data length.
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param Timeout Timeout duration
|
2017-01-18 13:38:39 +00:00
|
|
|
* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
|
|
|
* between Master and Slave(example: audio streaming).
|
|
|
|
* @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
|
|
|
|
* in continouse way and as the I2S is not disabled at the end of the I2S transaction.
|
|
|
|
* @retval HAL status
|
|
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
|
|
|
|
{
|
2018-03-02 03:34:09 +00:00
|
|
|
if((pData == NULL ) || (Size == 0U))
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
return HAL_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
if(hi2s->State == HAL_I2S_STATE_READY)
|
|
|
|
{
|
|
|
|
if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
|
|
|
|
((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
|
|
|
|
{
|
2018-03-02 03:34:09 +00:00
|
|
|
hi2s->RxXferSize = (Size << 1U);
|
|
|
|
hi2s->RxXferCount = (Size << 1U);
|
2017-01-18 13:38:39 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hi2s->RxXferSize = Size;
|
|
|
|
hi2s->RxXferCount = Size;
|
|
|
|
}
|
|
|
|
/* Process Locked */
|
|
|
|
__HAL_LOCK(hi2s);
|
|
|
|
|
|
|
|
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|
|
|
hi2s->State = HAL_I2S_STATE_BUSY_RX;
|
|
|
|
|
|
|
|
/* Check if the I2S is already enabled */
|
|
|
|
if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
|
|
|
{
|
|
|
|
/* Enable I2S peripheral */
|
|
|
|
__HAL_I2S_ENABLE(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check if Master Receiver mode is selected */
|
|
|
|
if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
|
|
|
|
{
|
|
|
|
/* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
|
|
|
|
access to the SPI_SR register. */
|
|
|
|
__HAL_I2S_CLEAR_OVRFLAG(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Receive data */
|
2018-03-02 03:34:09 +00:00
|
|
|
while(hi2s->RxXferCount > 0U)
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
/* Wait until RXNE flag is set */
|
|
|
|
if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, RESET, Timeout) != HAL_OK)
|
|
|
|
{
|
|
|
|
/* Set the error code and execute error callback*/
|
|
|
|
hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
|
|
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
|
|
return HAL_TIMEOUT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check if an overrun occurs */
|
|
|
|
if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
|
|
|
|
{
|
|
|
|
/* Set the I2S State ready */
|
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
/* Set the error code and execute error callback*/
|
|
|
|
hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
|
|
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
|
|
|
|
|
|
return HAL_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
(*pData++) = hi2s->Instance->DR;
|
|
|
|
hi2s->RxXferCount--;
|
|
|
|
}
|
|
|
|
|
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
return HAL_BUSY;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Transmit an amount of data in non-blocking mode with Interrupt
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param pData a 16-bit pointer to data buffer.
|
|
|
|
* @param Size number of data sample to be sent:
|
2017-01-18 13:38:39 +00:00
|
|
|
* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
|
|
|
* configuration phase, the Size parameter means the number of 16-bit data length
|
|
|
|
* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
|
|
|
* the Size parameter means the number of 16-bit data length.
|
|
|
|
* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
|
|
|
* between Master and Slave(example: audio streaming).
|
|
|
|
* @retval HAL status
|
|
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
|
|
|
|
{
|
|
|
|
if(hi2s->State == HAL_I2S_STATE_READY)
|
|
|
|
{
|
2018-03-02 03:34:09 +00:00
|
|
|
if((pData == NULL) || (Size == 0U))
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
return HAL_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
hi2s->pTxBuffPtr = pData;
|
|
|
|
if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
|
|
|
|
((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
|
|
|
|
{
|
2018-03-02 03:34:09 +00:00
|
|
|
hi2s->TxXferSize = (Size << 1U);
|
|
|
|
hi2s->TxXferCount = (Size << 1U);
|
2017-01-18 13:38:39 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hi2s->TxXferSize = Size;
|
|
|
|
hi2s->TxXferCount = Size;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Process Locked */
|
|
|
|
__HAL_LOCK(hi2s);
|
|
|
|
|
|
|
|
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|
|
|
hi2s->State = HAL_I2S_STATE_BUSY_TX;
|
|
|
|
|
|
|
|
/* Enable TXE and ERR interrupt */
|
|
|
|
__HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|
|
|
|
|
|
|
/* Check if the I2S is already enabled */
|
|
|
|
if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
|
|
|
{
|
|
|
|
/* Enable I2S peripheral */
|
|
|
|
__HAL_I2S_ENABLE(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
return HAL_BUSY;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Receive an amount of data in non-blocking mode with Interrupt
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param pData a 16-bit pointer to the Receive data buffer.
|
|
|
|
* @param Size number of data sample to be sent:
|
2017-01-18 13:38:39 +00:00
|
|
|
* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
|
|
|
* configuration phase, the Size parameter means the number of 16-bit data length
|
|
|
|
* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
|
|
|
* the Size parameter means the number of 16-bit data length.
|
|
|
|
* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
|
|
|
* between Master and Slave(example: audio streaming).
|
|
|
|
* @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
|
|
|
|
* between Master and Slave otherwise the I2S interrupt should be optimized.
|
|
|
|
* @retval HAL status
|
|
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
|
|
|
|
{
|
|
|
|
if(hi2s->State == HAL_I2S_STATE_READY)
|
|
|
|
{
|
2018-03-02 03:34:09 +00:00
|
|
|
if((pData == NULL) || (Size == 0U))
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
return HAL_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
hi2s->pRxBuffPtr = pData;
|
|
|
|
if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
|
|
|
|
((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
|
|
|
|
{
|
2018-03-02 03:34:09 +00:00
|
|
|
hi2s->RxXferSize = (Size << 1U);
|
|
|
|
hi2s->RxXferCount = (Size << 1U);
|
2017-01-18 13:38:39 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hi2s->RxXferSize = Size;
|
|
|
|
hi2s->RxXferCount = Size;
|
|
|
|
}
|
|
|
|
/* Process Locked */
|
|
|
|
__HAL_LOCK(hi2s);
|
|
|
|
|
|
|
|
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|
|
|
hi2s->State = HAL_I2S_STATE_BUSY_RX;
|
|
|
|
|
|
|
|
/* Enable TXE and ERR interrupt */
|
|
|
|
__HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|
|
|
|
|
|
|
/* Check if the I2S is already enabled */
|
|
|
|
if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
|
|
|
{
|
|
|
|
/* Enable I2S peripheral */
|
|
|
|
__HAL_I2S_ENABLE(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
return HAL_BUSY;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Transmit an amount of data in non-blocking mode with DMA
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param pData a 16-bit pointer to the Transmit data buffer.
|
|
|
|
* @param Size number of data sample to be sent:
|
2017-01-18 13:38:39 +00:00
|
|
|
* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
|
|
|
* configuration phase, the Size parameter means the number of 16-bit data length
|
|
|
|
* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
|
|
|
* the Size parameter means the number of 16-bit data length.
|
|
|
|
* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
|
|
|
* between Master and Slave(example: audio streaming).
|
|
|
|
* @retval HAL status
|
|
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
|
|
|
|
{
|
|
|
|
uint32_t *tmp;
|
|
|
|
|
2018-03-02 03:34:09 +00:00
|
|
|
if((pData == NULL) || (Size == 0U))
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
return HAL_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
if(hi2s->State == HAL_I2S_STATE_READY)
|
|
|
|
{
|
|
|
|
hi2s->pTxBuffPtr = pData;
|
|
|
|
if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
|
|
|
|
((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
|
|
|
|
{
|
2018-03-02 03:34:09 +00:00
|
|
|
hi2s->TxXferSize = (Size << 1U);
|
|
|
|
hi2s->TxXferCount = (Size << 1U);
|
2017-01-18 13:38:39 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hi2s->TxXferSize = Size;
|
|
|
|
hi2s->TxXferCount = Size;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Process Locked */
|
|
|
|
__HAL_LOCK(hi2s);
|
|
|
|
|
|
|
|
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|
|
|
hi2s->State = HAL_I2S_STATE_BUSY_TX;
|
|
|
|
|
|
|
|
/* Set the I2S Tx DMA Half transfer complete callback */
|
|
|
|
hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
|
|
|
|
|
|
|
|
/* Set the I2S Tx DMA transfer complete callback */
|
|
|
|
hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
|
|
|
|
|
|
|
|
/* Set the DMA error callback */
|
|
|
|
hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
|
|
|
|
|
|
|
|
/* Enable the Tx DMA Channel */
|
|
|
|
tmp = (uint32_t*)&pData;
|
|
|
|
HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
|
|
|
|
|
|
|
|
/* Check if the I2S is already enabled */
|
|
|
|
if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
|
|
|
{
|
|
|
|
/* Enable I2S peripheral */
|
|
|
|
__HAL_I2S_ENABLE(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Enable Tx DMA Request */
|
|
|
|
hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
return HAL_BUSY;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Receive an amount of data in non-blocking mode with DMA
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param pData a 16-bit pointer to the Receive data buffer.
|
|
|
|
* @param Size number of data sample to be sent:
|
2017-01-18 13:38:39 +00:00
|
|
|
* @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
|
|
|
|
* configuration phase, the Size parameter means the number of 16-bit data length
|
|
|
|
* in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
|
|
|
|
* the Size parameter means the number of 16-bit data length.
|
|
|
|
* @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
|
|
|
|
* between Master and Slave(example: audio streaming).
|
|
|
|
* @retval HAL status
|
|
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
|
|
|
|
{
|
|
|
|
uint32_t *tmp;
|
|
|
|
|
2018-03-02 03:34:09 +00:00
|
|
|
if((pData == NULL) || (Size == 0U))
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
return HAL_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
if(hi2s->State == HAL_I2S_STATE_READY)
|
|
|
|
{
|
|
|
|
hi2s->pRxBuffPtr = pData;
|
|
|
|
if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
|
|
|
|
((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
|
|
|
|
{
|
2018-03-02 03:34:09 +00:00
|
|
|
hi2s->RxXferSize = (Size << 1U);
|
|
|
|
hi2s->RxXferCount = (Size << 1U);
|
2017-01-18 13:38:39 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
hi2s->RxXferSize = Size;
|
|
|
|
hi2s->RxXferCount = Size;
|
|
|
|
}
|
|
|
|
/* Process Locked */
|
|
|
|
__HAL_LOCK(hi2s);
|
|
|
|
|
|
|
|
hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
|
|
|
|
hi2s->State = HAL_I2S_STATE_BUSY_RX;
|
|
|
|
|
|
|
|
/* Set the I2S Rx DMA Half transfer complete callback */
|
|
|
|
hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
|
|
|
|
|
|
|
|
/* Set the I2S Rx DMA transfer complete callback */
|
|
|
|
hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
|
|
|
|
|
|
|
|
/* Set the DMA error callback */
|
|
|
|
hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
|
|
|
|
|
|
|
|
/* Check if Master Receiver mode is selected */
|
|
|
|
if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
|
|
|
|
{
|
|
|
|
/* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
|
|
|
|
access to the SPI_SR register. */
|
|
|
|
__HAL_I2S_CLEAR_OVRFLAG(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Enable the Rx DMA Channel */
|
|
|
|
tmp = (uint32_t*)&pData;
|
|
|
|
HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize);
|
|
|
|
|
|
|
|
/* Check if the I2S is already enabled */
|
|
|
|
if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
|
|
|
|
{
|
|
|
|
/* Enable I2S peripheral */
|
|
|
|
__HAL_I2S_ENABLE(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Enable Rx DMA Request */
|
|
|
|
hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
return HAL_BUSY;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Pauses the audio stream playing from the Media.
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
|
|
|
* @retval HAL status
|
|
|
|
*/
|
|
|
|
__weak HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
/* Process Locked */
|
|
|
|
__HAL_LOCK(hi2s);
|
|
|
|
|
|
|
|
if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
|
|
|
|
{
|
|
|
|
/* Disable the I2S DMA Tx request */
|
|
|
|
hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
|
|
|
|
}
|
|
|
|
else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
|
|
|
|
{
|
|
|
|
/* Disable the I2S DMA Rx request */
|
|
|
|
hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Resumes the audio stream playing from the Media.
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
|
|
|
* @retval HAL status
|
|
|
|
*/
|
|
|
|
__weak HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
/* Process Locked */
|
|
|
|
__HAL_LOCK(hi2s);
|
|
|
|
|
|
|
|
if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
|
|
|
|
{
|
|
|
|
/* Enable the I2S DMA Tx request */
|
|
|
|
hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
|
|
|
|
}
|
|
|
|
else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
|
|
|
|
{
|
|
|
|
/* Enable the I2S DMA Rx request */
|
|
|
|
hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If the I2S peripheral is still not enabled, enable it */
|
2018-03-02 03:34:09 +00:00
|
|
|
if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0U)
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
/* Enable I2S peripheral */
|
|
|
|
__HAL_I2S_ENABLE(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Resumes the audio stream playing from the Media.
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
|
|
|
* @retval HAL status
|
|
|
|
*/
|
|
|
|
__weak HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
/* Process Locked */
|
|
|
|
__HAL_LOCK(hi2s);
|
|
|
|
|
|
|
|
/* Disable the I2S Tx/Rx DMA requests */
|
|
|
|
hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
|
|
|
|
hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
|
|
|
|
|
|
|
|
/* Abort the I2S DMA tx channel */
|
|
|
|
if(hi2s->hdmatx != NULL)
|
|
|
|
{
|
|
|
|
/* Disable the I2S DMA channel */
|
|
|
|
__HAL_DMA_DISABLE(hi2s->hdmatx);
|
|
|
|
HAL_DMA_Abort(hi2s->hdmatx);
|
|
|
|
}
|
|
|
|
/* Abort the I2S DMA rx channel */
|
|
|
|
if(hi2s->hdmarx != NULL)
|
|
|
|
{
|
|
|
|
/* Disable the I2S DMA channel */
|
|
|
|
__HAL_DMA_DISABLE(hi2s->hdmarx);
|
|
|
|
HAL_DMA_Abort(hi2s->hdmarx);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Disable I2S peripheral */
|
|
|
|
__HAL_I2S_DISABLE(hi2s);
|
|
|
|
|
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This function handles I2S interrupt request.
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
__IO uint32_t i2ssr = hi2s->Instance->SR;
|
|
|
|
|
|
|
|
if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
|
|
|
|
{
|
|
|
|
/* I2S in mode Receiver ----------------------------------------------------*/
|
|
|
|
if(((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
|
|
|
|
{
|
|
|
|
I2S_Receive_IT(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* I2S Overrun error interrupt occured -------------------------------------*/
|
|
|
|
if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
|
|
|
|
{
|
|
|
|
/* Disable RXNE and ERR interrupt */
|
|
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|
|
|
|
|
|
|
/* Set the I2S State ready */
|
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
|
|
|
|
|
|
/* Set the error code and execute error callback*/
|
|
|
|
hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
|
|
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
|
|
|
|
{
|
|
|
|
/* I2S in mode Tramitter ---------------------------------------------------*/
|
|
|
|
if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
|
|
|
|
{
|
|
|
|
I2S_Transmit_IT(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* I2S Underrun error interrupt occured ------------------------------------*/
|
|
|
|
if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
|
|
|
|
{
|
|
|
|
/* Disable TXE and ERR interrupt */
|
|
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|
|
|
|
|
|
|
/* Set the I2S State ready */
|
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
|
|
|
|
|
|
/* Set the error code and execute error callback*/
|
|
|
|
hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
|
|
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/** @addtogroup I2S_Exported_Functions I2S Exported Functions
|
|
|
|
* @{
|
|
|
|
*/
|
|
|
|
|
|
|
|
/** @addtogroup I2S_Exported_Functions_Group2 IO operation functions
|
|
|
|
* @{
|
|
|
|
*/
|
|
|
|
/**
|
|
|
|
* @brief Tx Transfer Half completed callbacks
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
__weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
/* Prevent unused argument(s) compilation warning */
|
|
|
|
UNUSED(hi2s);
|
|
|
|
|
|
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
|
|
the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Tx Transfer completed callbacks
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
__weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
/* Prevent unused argument(s) compilation warning */
|
|
|
|
UNUSED(hi2s);
|
|
|
|
|
|
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
|
|
the HAL_I2S_TxCpltCallback could be implemented in the user file
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Rx Transfer half completed callbacks
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
__weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
/* Prevent unused argument(s) compilation warning */
|
|
|
|
UNUSED(hi2s);
|
|
|
|
|
|
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
|
|
the HAL_I2S_RxCpltCallback could be implemented in the user file
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Rx Transfer completed callbacks
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
__weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
/* Prevent unused argument(s) compilation warning */
|
|
|
|
UNUSED(hi2s);
|
|
|
|
|
|
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
|
|
the HAL_I2S_RxCpltCallback could be implemented in the user file
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief I2S error callbacks
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
__weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
/* Prevent unused argument(s) compilation warning */
|
|
|
|
UNUSED(hi2s);
|
|
|
|
|
|
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
|
|
the HAL_I2S_ErrorCallback could be implemented in the user file
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
*/
|
|
|
|
|
|
|
|
/** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
|
|
|
|
* @brief Peripheral State functions
|
|
|
|
*
|
|
|
|
@verbatim
|
|
|
|
===============================================================================
|
|
|
|
##### Peripheral State and Errors functions #####
|
|
|
|
===============================================================================
|
|
|
|
[..]
|
|
|
|
This subsection permits to get in run-time the status of the peripheral
|
|
|
|
and the data flow.
|
|
|
|
|
|
|
|
@endverbatim
|
|
|
|
* @{
|
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Return the I2S state
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
|
|
|
* @retval HAL state
|
|
|
|
*/
|
|
|
|
HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
return hi2s->State;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Return the I2S error code
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
|
|
|
* @retval I2S Error Code
|
|
|
|
*/
|
|
|
|
uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
return hi2s->ErrorCode;
|
|
|
|
}
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
*/
|
|
|
|
|
|
|
|
/** @addtogroup I2S_Private_Functions I2S Private Functions
|
|
|
|
* @{
|
|
|
|
*/
|
|
|
|
/**
|
|
|
|
* @brief DMA I2S transmit process complete callback
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
2017-01-18 13:38:39 +00:00
|
|
|
* the configuration information for the specified DMA module.
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
|
|
|
|
{
|
|
|
|
I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
|
|
|
2018-03-02 03:34:09 +00:00
|
|
|
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
/* Disable Tx DMA Request */
|
|
|
|
hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
|
|
|
|
|
2018-03-02 03:34:09 +00:00
|
|
|
hi2s->TxXferCount = 0U;
|
2017-01-18 13:38:39 +00:00
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
|
|
}
|
|
|
|
HAL_I2S_TxCpltCallback(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief DMA I2S transmit process half complete callback
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
2017-01-18 13:38:39 +00:00
|
|
|
* the configuration information for the specified DMA module.
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
|
|
|
|
{
|
|
|
|
I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
|
|
|
|
|
|
|
|
HAL_I2S_TxHalfCpltCallback(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief DMA I2S receive process complete callback
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
2017-01-18 13:38:39 +00:00
|
|
|
* the configuration information for the specified DMA module.
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
|
|
|
|
{
|
|
|
|
I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
|
|
|
2018-03-02 03:34:09 +00:00
|
|
|
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
/* Disable Rx DMA Request */
|
|
|
|
hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
|
2018-03-02 03:34:09 +00:00
|
|
|
hi2s->RxXferCount = 0U;
|
2017-01-18 13:38:39 +00:00
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
|
|
}
|
|
|
|
HAL_I2S_RxCpltCallback(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief DMA I2S receive process half complete callback
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
2017-01-18 13:38:39 +00:00
|
|
|
* the configuration information for the specified DMA module.
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
|
|
|
|
{
|
|
|
|
I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
|
|
|
|
|
|
|
|
HAL_I2S_RxHalfCpltCallback(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief DMA I2S communication error callback
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
2017-01-18 13:38:39 +00:00
|
|
|
* the configuration information for the specified DMA module.
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static void I2S_DMAError(DMA_HandleTypeDef *hdma)
|
|
|
|
{
|
|
|
|
I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
|
|
|
|
|
|
/* Disable Rx and Tx DMA Request */
|
|
|
|
hi2s->Instance->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
|
2018-03-02 03:34:09 +00:00
|
|
|
hi2s->TxXferCount = 0U;
|
|
|
|
hi2s->RxXferCount = 0U;
|
2017-01-18 13:38:39 +00:00
|
|
|
|
|
|
|
hi2s->State= HAL_I2S_STATE_READY;
|
|
|
|
|
|
|
|
/* Set the error code and execute error callback*/
|
|
|
|
hi2s->ErrorCode |= HAL_I2S_ERROR_DMA;
|
|
|
|
HAL_I2S_ErrorCallback(hi2s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Transmit an amount of data in non-blocking mode with Interrupt
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
/* Transmit data */
|
|
|
|
hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
|
|
|
|
hi2s->TxXferCount--;
|
|
|
|
|
2018-03-02 03:34:09 +00:00
|
|
|
if(hi2s->TxXferCount == 0U)
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
/* Disable TXE and ERR interrupt */
|
|
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
|
|
|
|
|
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
|
|
HAL_I2S_TxCpltCallback(hi2s);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief Receive an amount of data in non-blocking mode with Interrupt
|
|
|
|
* @param hi2s: I2S handle
|
|
|
|
* @retval None
|
|
|
|
*/
|
|
|
|
static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
|
|
|
|
{
|
|
|
|
/* Receive data */
|
|
|
|
(*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
|
|
|
|
hi2s->RxXferCount--;
|
|
|
|
|
2018-03-02 03:34:09 +00:00
|
|
|
if(hi2s->RxXferCount == 0U)
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
/* Disable RXNE and ERR interrupt */
|
|
|
|
__HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
|
|
|
|
|
|
|
|
hi2s->State = HAL_I2S_STATE_READY;
|
|
|
|
HAL_I2S_RxCpltCallback(hi2s);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief This function handles I2S Communication Timeout.
|
|
|
|
* @param hi2s: pointer to a I2S_HandleTypeDef structure that contains
|
|
|
|
* the configuration information for I2S module
|
2018-03-02 03:34:09 +00:00
|
|
|
* @param Flag Flag checked
|
|
|
|
* @param State Value of the flag expected
|
|
|
|
* @param Timeout Duration of the timeout
|
2017-01-18 13:38:39 +00:00
|
|
|
* @retval HAL status
|
|
|
|
*/
|
|
|
|
static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, uint32_t Timeout)
|
|
|
|
{
|
|
|
|
uint32_t tickstart = HAL_GetTick();
|
|
|
|
|
|
|
|
/* Wait until flag is set */
|
|
|
|
if(State == RESET)
|
|
|
|
{
|
|
|
|
while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
|
|
|
|
{
|
|
|
|
if(Timeout != HAL_MAX_DELAY)
|
|
|
|
{
|
2018-03-02 03:34:09 +00:00
|
|
|
if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
/* Set the I2S State ready */
|
|
|
|
hi2s->State= HAL_I2S_STATE_READY;
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
return HAL_TIMEOUT;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
|
|
|
|
{
|
|
|
|
if(Timeout != HAL_MAX_DELAY)
|
|
|
|
{
|
2018-03-02 03:34:09 +00:00
|
|
|
if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
|
2017-01-18 13:38:39 +00:00
|
|
|
{
|
|
|
|
/* Set the I2S State ready */
|
|
|
|
hi2s->State= HAL_I2S_STATE_READY;
|
|
|
|
|
|
|
|
/* Process Unlocked */
|
|
|
|
__HAL_UNLOCK(hi2s);
|
|
|
|
|
|
|
|
return HAL_TIMEOUT;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return HAL_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
*/
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @}
|
|
|
|
*/
|
|
|
|
#endif /* STM32F302xE || STM32F303xE || STM32F398xx || */
|
|
|
|
/* STM32F302xC || STM32F303xC || STM32F358xx || */
|
|
|
|
/* STM32F301x8 || STM32F302x8 || STM32F318xx || */
|
|
|
|
/* STM32F373xC || STM32F378xx */
|
|
|
|
|
|
|
|
#endif /* HAL_I2S_MODULE_ENABLED */
|
|
|
|
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|