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stmbl/hw/kicad/v3.4/hv.sch

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2015-12-08 02:18:40 +00:00
EESchema Schematic File Version 2
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LIBS:power
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LIBS:stmbl_3.4-cache
EELAYER 25 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
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F1 "f1.sch" 60
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F18 "A_T_MOT" I L 6000 2300 60
F19 "A_T_PCB" I L 6000 2200 60
F20 "HV_EN" I R 7000 2600 60
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$EndSheet
$Sheet
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$Sheet
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F1 "hv_sense.sch" 60
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F9 "HV_" I L 6000 3850 60
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F3 "V" I L 7400 3600 60
F4 "U" I L 7400 3500 60
F5 "V-" I L 7400 3950 60
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F7 "Vth" I L 7400 2900 60
F8 "HU" I L 7400 1900 60
F9 "LU" I L 7400 2000 60
F10 "HV" I L 7400 2100 60
F11 "LV" I L 7400 2200 60
F12 "HW" I L 7400 2300 60
F13 "LW" I L 7400 2400 60
F14 "en" I L 7400 2600 60
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
7000 2700 7200 2700
Wire Wire Line
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Connection ~ 7200 2600
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Wire Wire Line
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Wire Wire Line
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TX
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RX
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Wire Wire Line
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2015-12-08 02:37:36 +00:00
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2015-12-08 02:18:40 +00:00
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2015-12-08 02:37:36 +00:00
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2015-12-08 02:18:40 +00:00
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2015-12-08 02:37:36 +00:00
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2015-12-08 02:18:40 +00:00
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2015-12-08 02:18:40 +00:00
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2015-12-08 02:37:36 +00:00
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2015-12-08 02:18:40 +00:00
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2015-12-08 02:37:36 +00:00
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2015-12-08 02:18:40 +00:00
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2015-12-08 02:37:36 +00:00
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2015-12-08 02:18:40 +00:00
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2015-12-08 02:37:36 +00:00
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2015-12-08 02:18:40 +00:00
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