1
0
mirror of https://github.com/rene-dev/stmbl.git synced 2024-12-25 18:12:17 +00:00
stmbl/hw/spice/res2.5.asc

289 lines
6.3 KiB
Plaintext
Raw Permalink Normal View History

2014-09-20 22:34:42 +00:00
Version 4
SHEET 1 5176 960
WIRE 3744 -16 2928 -16
WIRE 3728 16 3680 16
2014-11-28 03:35:22 +00:00
WIRE 3456 64 3328 64
WIRE 3536 64 3456 64
2014-09-20 22:34:42 +00:00
WIRE 3632 64 3616 64
WIRE 3680 64 3680 16
WIRE 3680 64 3632 64
WIRE 3456 80 3456 64
WIRE 3632 80 3632 64
WIRE 3744 96 3744 -16
WIRE 3680 112 3680 64
WIRE 3712 112 3680 112
WIRE 1184 128 1088 128
WIRE 1296 128 1184 128
2014-12-17 06:12:01 +00:00
WIRE 1568 128 1296 128
2014-09-20 22:34:42 +00:00
WIRE 2624 128 1568 128
WIRE 2928 128 2928 -16
2014-12-17 06:12:01 +00:00
WIRE 2928 128 2848 128
2014-09-20 22:34:42 +00:00
WIRE 3808 128 3808 16
WIRE 3808 128 3776 128
WIRE 3936 128 3808 128
WIRE 3712 144 3680 144
WIRE 3936 160 3936 128
WIRE 2688 176 2512 176
WIRE 3456 176 3456 160
2014-11-28 03:35:22 +00:00
WIRE 3456 176 3360 176
WIRE 3536 176 3456 176
2014-09-20 22:34:42 +00:00
WIRE 3632 176 3632 144
WIRE 3632 176 3616 176
WIRE 3680 176 3680 144
WIRE 3680 176 3632 176
WIRE 3328 192 3328 64
WIRE 1296 224 1296 128
WIRE 1856 224 1760 224
WIRE 2080 224 1856 224
WIRE 3680 224 3680 176
WIRE 3680 224 3184 224
WIRE 1696 240 1600 240
WIRE 3936 240 3824 240
WIRE 4064 240 3936 240
WIRE 4096 240 4064 240
WIRE 1088 256 1088 128
WIRE 1184 256 1184 128
WIRE 2368 256 2256 256
WIRE 1760 272 1760 224
WIRE 2624 288 2624 128
2014-12-17 06:12:01 +00:00
WIRE 1600 304 1600 240
2014-09-20 22:34:42 +00:00
WIRE 2512 304 2512 256
WIRE 2592 304 2512 304
2014-12-17 06:12:01 +00:00
WIRE 2848 304 2848 128
WIRE 3040 304 2960 304
2014-09-20 22:34:42 +00:00
WIRE 3360 304 3360 176
WIRE 2080 320 2080 304
WIRE 2256 320 2256 256
WIRE 2256 320 2080 320
WIRE 2688 320 2688 176
WIRE 2688 320 2656 320
WIRE 2704 320 2688 320
2014-12-17 06:12:01 +00:00
WIRE 3040 320 3040 304
2014-09-20 22:34:42 +00:00
WIRE 3056 320 3040 320
WIRE 3104 320 3104 224
WIRE 3104 320 3056 320
WIRE 3136 320 3104 320
WIRE 2368 336 2368 320
WIRE 2432 336 2368 336
WIRE 2592 336 2432 336
WIRE 1088 384 1088 320
WIRE 1184 384 1184 320
WIRE 1184 384 1088 384
WIRE 1296 384 1296 304
WIRE 1296 384 1184 384
2014-12-17 06:12:01 +00:00
WIRE 1536 384 1296 384
WIRE 1600 384 1536 384
2014-09-20 22:34:42 +00:00
WIRE 1760 384 1760 352
2014-12-17 06:12:01 +00:00
WIRE 1760 384 1600 384
2014-09-20 22:34:42 +00:00
WIRE 1856 384 1760 384
WIRE 1984 384 1856 384
WIRE 2160 384 1984 384
WIRE 2624 384 2624 352
WIRE 2624 384 2160 384
2014-12-17 06:12:01 +00:00
WIRE 2848 384 2624 384
WIRE 2960 384 2848 384
WIRE 3056 384 2960 384
2014-09-20 22:34:42 +00:00
WIRE 3136 384 3056 384
WIRE 3744 384 3744 160
WIRE 3744 384 3136 384
WIRE 3824 384 3824 304
WIRE 3824 384 3744 384
WIRE 3936 384 3936 320
WIRE 3936 384 3824 384
WIRE 1296 400 1296 384
WIRE 2080 400 2080 320
WIRE 2368 416 2368 336
WIRE 2512 416 2512 304
2014-12-17 06:12:01 +00:00
WIRE 2688 416 2688 400
WIRE 2784 416 2784 320
2014-09-20 22:34:42 +00:00
WIRE 3360 416 3360 304
WIRE 3616 416 3360 416
WIRE 2160 464 2160 384
WIRE 2160 464 2080 464
WIRE 1696 496 1696 240
WIRE 1856 496 1856 448
WIRE 1856 496 1696 496
WIRE 1984 496 1984 448
WIRE 1984 496 1856 496
WIRE 2368 496 1984 496
WIRE 2512 496 2368 496
2014-12-17 06:12:01 +00:00
WIRE 2688 496 2512 496
WIRE 2784 496 2688 496
2014-09-20 22:34:42 +00:00
WIRE 3328 496 3328 192
WIRE 3600 496 3328 496
2014-11-28 12:12:30 +00:00
WIRE 3328 528 3248 528
2014-09-20 22:34:42 +00:00
WIRE 3600 528 3600 496
2014-11-28 12:12:30 +00:00
WIRE 3600 528 3328 528
WIRE 3328 560 3328 528
2014-09-20 22:34:42 +00:00
WIRE 2768 576 2608 576
WIRE 2768 592 2768 576
WIRE 1536 672 1536 384
WIRE 2608 672 2608 656
WIRE 2608 672 1536 672
WIRE 2768 672 2608 672
WIRE 3328 672 3328 640
2014-11-28 03:35:22 +00:00
WIRE 3504 672 3328 672
2014-09-20 22:34:42 +00:00
WIRE 3616 672 3616 416
2014-11-28 03:35:22 +00:00
WIRE 3616 672 3504 672
2014-09-20 22:34:42 +00:00
WIRE 3136 768 3136 384
WIRE 3248 768 3248 624
WIRE 3248 768 3136 768
WIRE 3328 768 3248 768
FLAG 1296 400 0
FLAG 1856 224 r_in
FLAG 2256 256 r2_in
FLAG 2432 336 r3_in
2014-12-17 06:12:01 +00:00
FLAG 1568 128 24V
2014-09-20 22:34:42 +00:00
FLAG 4064 240 sig
FLAG 3808 128 op_out
FLAG 2784 320 out
FLAG 2688 320 out_op
FLAG 3328 192 in_pos
FLAG 3360 304 in_neg
SYMBOL voltage 1296 208 R0
SYMATTR InstName V3
2014-12-23 01:24:41 +00:00
SYMATTR Value 12
2014-09-20 22:34:42 +00:00
SYMATTR SpiceLine Rser=1
SYMBOL ind2 2768 400 R0
SYMATTR InstName L1
SYMATTR Value 7m
SYMATTR Type ind
SYMATTR SpiceLine Rser=30
SYMBOL Opamps/LT1497 2624 256 R0
WINDOW 3 34 101 Left 2
SYMATTR InstName U2
SYMBOL ind2 3312 544 R0
SYMATTR InstName L2
SYMATTR Value 7m
SYMATTR SpiceLine Rser=70
SYMBOL res 2352 400 R0
SYMATTR InstName R5
2014-12-17 06:12:01 +00:00
SYMATTR Value 1k
2014-09-20 22:34:42 +00:00
SYMBOL cap 2352 256 R0
SYMATTR InstName C1
2014-12-17 06:12:01 +00:00
SYMATTR Value 100n
2014-09-20 22:34:42 +00:00
SYMBOL res 2496 160 R0
SYMATTR InstName R6
2015-02-23 00:54:37 +00:00
SYMATTR Value 3.9k
2014-09-20 22:34:42 +00:00
SYMBOL res 2496 400 R0
SYMATTR InstName R9
2014-12-17 06:12:01 +00:00
SYMATTR Value 1k
2014-09-20 22:34:42 +00:00
SYMBOL voltage 1760 256 R0
SYMATTR InstName V4
SYMATTR Value PULSE(0 3.3 0 10n 10n 0.05m 0.1m)
SYMATTR SpiceLine Rser=1
SYMBOL cap 2064 400 R0
SYMATTR InstName C6
2014-12-17 06:12:01 +00:00
SYMATTR Value 100n
2014-09-20 22:34:42 +00:00
SYMBOL res 2064 208 R0
SYMATTR InstName R14
2014-12-23 01:24:41 +00:00
SYMATTR Value 470
2014-09-20 22:34:42 +00:00
SYMBOL cap 1840 384 R0
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL polcap 1968 384 R0
SYMATTR InstName C3
SYMATTR Value 500<30>
SYMBOL cap 1168 256 R0
SYMATTR InstName C4
SYMATTR Value 100n
SYMBOL polcap 1072 256 R0
SYMATTR InstName C5
SYMATTR Value 500<30>
SYMBOL ind2 2752 576 R0
SYMATTR InstName L3
SYMATTR Value 7m
SYMATTR Type ind
SYMATTR SpiceLine Rser=30
SYMBOL voltage 2608 560 R0
SYMATTR InstName V1
SYMATTR Value PULSE(0 100 0 10n 10n 0.0005m 0.0315m)
SYMATTR SpiceLine Rser=1
SYMBOL Opamps/LT1497 3744 64 R0
WINDOW 3 34 101 Left 2
SYMATTR InstName U5
SYMBOL res 3824 0 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R12
2014-12-23 01:24:41 +00:00
SYMATTR Value 3.9k
2014-09-20 22:34:42 +00:00
SYMBOL cap 3040 320 R0
SYMATTR InstName C7
SYMATTR Value 100n
SYMBOL polcap 3120 320 R0
SYMATTR InstName C8
SYMATTR Value 500<30>
SYMBOL res 3920 224 R0
SYMATTR InstName R8
2014-11-28 12:12:30 +00:00
SYMATTR Value 180
2014-09-20 22:34:42 +00:00
SYMBOL res 3920 144 R0
SYMATTR InstName R11
2014-12-17 06:12:01 +00:00
SYMATTR Value 330
2014-09-20 22:34:42 +00:00
SYMBOL cap 3808 240 R0
SYMATTR InstName C10
2014-11-28 03:35:22 +00:00
SYMATTR Value 1n
2014-09-20 22:34:42 +00:00
SYMBOL voltage 3328 672 R0
SYMATTR InstName V2
2014-12-17 06:12:01 +00:00
SYMATTR Value SINE(1 0.5 10000 0)
2014-09-20 22:34:42 +00:00
SYMATTR SpiceLine Rser=1
SYMBOL res 2800 304 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R16
2014-12-23 01:24:41 +00:00
SYMATTR Value 66
2014-09-20 22:34:42 +00:00
SYMBOL voltage 3248 528 R0
2014-11-28 03:35:22 +00:00
SYMATTR InstName V6
2014-12-17 06:12:01 +00:00
SYMATTR Value SINE(1 0.5 10000 0 0 180)
2014-09-20 22:34:42 +00:00
SYMATTR SpiceLine Rser=1
SYMBOL res 3440 64 R0
SYMATTR InstName R21
2014-12-01 00:24:52 +00:00
SYMATTR Value 470
2014-09-20 22:34:42 +00:00
SYMBOL res 3632 48 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL res 3632 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R7
SYMATTR Value 1k
SYMBOL res 3200 208 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R20
2014-12-23 01:24:41 +00:00
SYMATTR Value 3.9k
2014-09-20 22:34:42 +00:00
SYMBOL cap 3616 80 R0
SYMATTR InstName C9
2014-11-27 14:15:57 +00:00
SYMATTR Value 1n
2014-11-28 03:35:22 +00:00
SYMBOL voltage 3504 576 R0
SYMATTR InstName V5
SYMATTR Value PULSE(0 1 0 10n 10n 0.01m 0.02m)
SYMATTR SpiceLine Rser=1
2014-12-17 06:12:01 +00:00
SYMBOL ind2 2672 400 R0
SYMATTR InstName L4
SYMATTR Value 7m
SYMATTR Type ind
SYMATTR SpiceLine Rser=30
SYMBOL res 2704 416 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R10
SYMATTR Value 50
SYMBOL voltage 2960 288 R0
SYMATTR InstName V7
SYMATTR Value 5
SYMATTR SpiceLine Rser=1
SYMBOL voltage 1600 288 R0
SYMATTR InstName V8
2014-12-23 01:24:41 +00:00
SYMATTR Value 5
2014-12-17 06:12:01 +00:00
SYMATTR SpiceLine Rser=1
SYMBOL voltage 2848 288 R0
SYMATTR InstName V9
SYMATTR Value 12
SYMATTR SpiceLine Rser=1
2014-11-28 03:35:22 +00:00
TEXT 1664 -48 Left 2 !.tran 0 2mS
2014-09-20 22:34:42 +00:00
TEXT 2480 -48 Left 2 !K1 L1 L2 0.5
2014-12-17 06:12:01 +00:00
TEXT 2480 16 Left 2 !K2 L3 L2 0.0
2014-09-20 22:34:42 +00:00
TEXT 2448 224 Left 2 ;poti