mirror of https://github.com/rene-dev/stmbl.git
61 lines
1.2 KiB
Prolog
61 lines
1.2 KiB
Prolog
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update=2017 May 31, Wednesday 01:28:45
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version=1
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last_client=kicad
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[pcbnew]
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version=1
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LastNetListRead=
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UseCmpFile=1
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PadDrill=0.600000000000
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PadDrillOvalY=0.600000000000
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PadSizeH=1.500000000000
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PadSizeV=1.500000000000
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PcbTextSizeV=1.500000000000
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PcbTextSizeH=1.500000000000
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PcbTextThickness=0.300000000000
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ModuleTextSizeV=1.000000000000
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ModuleTextSizeH=1.000000000000
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ModuleTextSizeThickness=0.150000000000
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SolderMaskClearance=0.000000000000
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SolderMaskMinWidth=0.000000000000
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DrawSegmentWidth=0.200000000000
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BoardOutlineThickness=0.100000000000
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ModuleOutlineThickness=0.150000000000
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[cvpcb]
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version=1
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NetIExt=net
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[eeschema]
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version=1
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LibDir=
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[eeschema/libraries]
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LibName1=power
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LibName2=device
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LibName3=transistors
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LibName4=conn
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LibName5=linear
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LibName6=regul
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LibName7=74xx
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LibName8=cmos4000
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LibName9=adc-dac
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LibName10=memory
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LibName11=xilinx
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LibName12=microcontrollers
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LibName13=dsp
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LibName14=microchip
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LibName15=analog_switches
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LibName16=motorola
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LibName17=texas
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LibName18=intel
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LibName19=audio
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LibName20=interface
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LibName21=digital-audio
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LibName22=philips
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LibName23=display
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LibName24=cypress
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LibName25=siliconi
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LibName26=opto
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LibName27=atmel
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LibName28=contrib
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LibName29=valves
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[general]
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version=1
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