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stmbl/hw/kicad/11ua/11ua.kicad_pcb

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2019-10-24 12:30:17 +00:00
(kicad_pcb (version 20190605) (host pcbnew "(5.1.0-1348-g3514473a5)")
2017-08-10 18:24:37 +00:00
2019-02-22 14:34:44 +00:00
(general
(thickness 1.6)
(drawings 4)
2019-10-24 12:30:17 +00:00
(tracks 233)
2019-02-22 22:41:21 +00:00
(modules 26)
2019-02-23 00:18:23 +00:00
(nets 22)
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)
2017-08-10 18:24:37 +00:00
2019-10-24 12:30:17 +00:00
(page "A4")
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(layers
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(0 "F.Cu" signal)
(31 "B.Cu" signal)
(32 "B.Adhes" user)
(33 "F.Adhes" user)
(34 "B.Paste" user)
(35 "F.Paste" user)
(36 "B.SilkS" user)
(37 "F.SilkS" user)
(38 "B.Mask" user)
(39 "F.Mask" user)
(40 "Dwgs.User" user)
(41 "Cmts.User" user)
(42 "Eco1.User" user)
(43 "Eco2.User" user)
(44 "Edge.Cuts" user)
(45 "Margin" user)
(46 "B.CrtYd" user)
(47 "F.CrtYd" user)
(48 "B.Fab" user)
(49 "F.Fab" user)
2019-02-22 14:34:44 +00:00
)
2017-08-10 18:24:37 +00:00
2019-02-22 14:34:44 +00:00
(setup
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(last_trace_width 0.15)
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(trace_clearance 0.2)
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(zone_clearance 0.2)
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(zone_45_only no)
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(trace_min 0.15)
(via_size 0.6)
(via_drill 0.3)
(via_min_size 0.6)
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(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
2019-10-24 12:30:17 +00:00
(max_error 0.005)
(defaults
(edge_clearance 0.01)
(edge_cuts_line_width 0.15)
(courtyard_line_width 0.05)
(copper_line_width 0.2)
(copper_text_dims (size 1.5 1.5) (thickness 0.3) keep_upright)
(silk_line_width 0.15)
(silk_text_dims (size 1 1) (thickness 0.15) keep_upright)
(other_layers_line_width 0.1)
(other_layers_text_dims (size 1 1) (thickness 0.15) keep_upright)
)
2019-02-22 22:41:21 +00:00
(pad_size 0.59 0.8)
(pad_drill 0)
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(pad_to_mask_clearance 0.2)
(aux_axis_origin 0 0)
(visible_elements FFF9FF7F)
(pcbplotparams
(layerselection 0x00030_ffffffff)
(usegerberextensions false)
(usegerberattributes true)
(usegerberadvancedattributes true)
(creategerberjobfile true)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
2017-08-10 18:24:37 +00:00
2019-02-22 14:34:44 +00:00
(net 0 "")
(net 1 "Net-(C1-Pad2)")
2019-02-22 22:41:21 +00:00
(net 2 "Net-(C2-Pad2)")
(net 3 "Net-(C3-Pad1)")
(net 4 "Net-(C3-Pad2)")
(net 5 "Net-(C4-Pad2)")
(net 6 "Net-(C4-Pad1)")
2019-10-24 12:30:17 +00:00
(net 7 "GND")
(net 8 "+5V")
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(net 9 "Net-(C7-Pad2)")
(net 10 "Net-(C7-Pad1)")
(net 11 "Net-(C8-Pad2)")
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(net 12 "2.5V")
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(net 13 "Net-(C6-Pad2)")
2019-02-23 00:18:23 +00:00
(net 14 "Net-(J1-Pad10)")
(net 15 "Net-(J1-Pad9)")
(net 16 "Net-(J1-Pad12)")
(net 17 "Net-(J1-Pad11)")
(net 18 "Net-(J2-Pad10)")
(net 19 "Net-(J2-Pad9)")
(net 20 "Net-(J2-Pad12)")
(net 21 "Net-(J2-Pad11)")
2017-10-26 11:45:37 +00:00
2019-10-24 12:30:17 +00:00
(net_class "Default" "This is the default net class."
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(clearance 0.2)
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(trace_width 0.15)
(via_dia 0.6)
(via_drill 0.3)
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(uvia_dia 0.3)
(uvia_drill 0.1)
2019-10-24 12:30:17 +00:00
(add_net "+5V")
(add_net "2.5V")
(add_net "GND")
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(add_net "Net-(C1-Pad2)")
(add_net "Net-(C2-Pad2)")
(add_net "Net-(C3-Pad1)")
(add_net "Net-(C3-Pad2)")
(add_net "Net-(C4-Pad1)")
(add_net "Net-(C4-Pad2)")
2019-02-22 22:41:21 +00:00
(add_net "Net-(C6-Pad2)")
2019-02-22 14:34:44 +00:00
(add_net "Net-(C7-Pad1)")
(add_net "Net-(C7-Pad2)")
(add_net "Net-(C8-Pad2)")
2019-02-23 00:18:23 +00:00
(add_net "Net-(J1-Pad10)")
(add_net "Net-(J1-Pad11)")
(add_net "Net-(J1-Pad12)")
(add_net "Net-(J1-Pad9)")
(add_net "Net-(J2-Pad10)")
(add_net "Net-(J2-Pad11)")
(add_net "Net-(J2-Pad12)")
(add_net "Net-(J2-Pad9)")
)
2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:R_0603" (layer "F.Cu") (tedit 5AC562FC) (tstamp 5C70C95F)
2019-03-14 14:25:14 +00:00
(at 145.3365 70.4 180)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
2019-10-24 12:30:17 +00:00
(path "/5C724DB4")
2019-03-14 14:25:14 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
(fp_text reference "R10" (at -3.248 0.04 180) (layer "F.SilkS") hide
2019-03-14 14:25:14 +00:00
(effects (font (size 0.8 0.8) (thickness 0.2)))
2019-02-23 00:18:23 +00:00
)
2019-10-24 12:30:17 +00:00
(fp_text value "100k" (at 0 1.4 180) (layer "F.Fab")
2019-03-14 14:25:14 +00:00
(effects (font (size 1 1) (thickness 0.15)))
2019-02-23 00:18:23 +00:00
)
2019-10-24 12:30:17 +00:00
(fp_line (start 1.3 -0.6) (end 1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 -0.6) (end -1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 0.6) (end 1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 -0.6) (end 1.3 -0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start -0.5 -0.4) (end -0.5 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.5 -0.4) (end 0.5 0.4) (layer "F.SilkS") (width 0.15))
(pad "2" smd roundrect (at 0.75 0 180) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
2019-03-14 14:25:14 +00:00
(net 9 "Net-(C7-Pad2)") (solder_mask_margin 0.1))
2019-10-24 12:30:17 +00:00
(pad "1" smd roundrect (at -0.75 0 180) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
2019-03-14 14:25:14 +00:00
(net 10 "Net-(C7-Pad1)") (solder_mask_margin 0.1))
2019-10-24 12:30:17 +00:00
(model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
2019-02-23 00:18:23 +00:00
(at (xyz 0 0 0))
2019-03-14 14:25:14 +00:00
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
2019-02-23 00:18:23 +00:00
)
)
2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:R_0603" (layer "F.Cu") (tedit 5AC562FC) (tstamp 5C70B23A)
2019-03-14 14:25:14 +00:00
(at 148.1 73.85 270)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
2019-10-24 12:30:17 +00:00
(path "/5C724DC0")
2019-03-14 14:25:14 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
(fp_text reference "R9" (at -3.248 0.04 270) (layer "F.SilkS") hide
2019-03-14 14:25:14 +00:00
(effects (font (size 0.8 0.8) (thickness 0.2)))
2019-02-23 00:18:23 +00:00
)
2019-10-24 12:30:17 +00:00
(fp_text value "100k" (at 0 1.4 270) (layer "F.Fab")
2019-02-23 00:18:23 +00:00
(effects (font (size 1 1) (thickness 0.15)))
)
2019-10-24 12:30:17 +00:00
(fp_line (start 1.3 -0.6) (end 1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 -0.6) (end -1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 0.6) (end 1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 -0.6) (end 1.3 -0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start -0.5 -0.4) (end -0.5 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.5 -0.4) (end 0.5 0.4) (layer "F.SilkS") (width 0.15))
(pad "2" smd roundrect (at 0.75 0 270) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
2019-03-14 14:25:14 +00:00
(net 11 "Net-(C8-Pad2)") (solder_mask_margin 0.1))
2019-10-24 12:30:17 +00:00
(pad "1" smd roundrect (at -0.75 0 270) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
(net 12 "2.5V") (solder_mask_margin 0.1))
(model "Resistors_SMD.3dshapes/R_0603.wrl"
2019-02-23 00:18:23 +00:00
(at (xyz 0 0 0))
2019-03-14 14:25:14 +00:00
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
2019-02-23 00:18:23 +00:00
)
2019-10-24 12:30:17 +00:00
(model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
2019-03-14 14:48:34 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
2019-02-22 22:41:21 +00:00
)
2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:R_0603" (layer "F.Cu") (tedit 5AC562FC) (tstamp 592E3506)
2019-03-14 14:25:14 +00:00
(at 146.85 82.562 180)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
2019-10-24 12:30:17 +00:00
(path "/592E1BCC")
2019-02-22 22:41:21 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
(fp_text reference "R8" (at -3.248 0.04 180) (layer "F.SilkS") hide
2019-03-14 14:25:14 +00:00
(effects (font (size 0.8 0.8) (thickness 0.2)))
2019-02-22 22:41:21 +00:00
)
2019-10-24 12:30:17 +00:00
(fp_text value "120" (at 0 1.4 180) (layer "F.Fab")
2019-02-22 22:41:21 +00:00
(effects (font (size 1 1) (thickness 0.15)))
)
2019-10-24 12:30:17 +00:00
(fp_line (start 1.3 -0.6) (end 1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 -0.6) (end -1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 0.6) (end 1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 -0.6) (end 1.3 -0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start -0.5 -0.4) (end -0.5 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.5 -0.4) (end 0.5 0.4) (layer "F.SilkS") (width 0.15))
(pad "2" smd roundrect (at 0.75 0 180) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
2019-03-14 14:25:14 +00:00
(net 13 "Net-(C6-Pad2)") (solder_mask_margin 0.1))
2019-10-24 12:30:17 +00:00
(pad "1" smd roundrect (at -0.75 0 180) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
(net 7 "GND") (solder_mask_margin 0.1))
(model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
2019-02-22 22:41:21 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:R_0603" (layer "F.Cu") (tedit 5AC562FC) (tstamp 592E34F6)
2019-03-14 14:25:14 +00:00
(at 146.85 81.292)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
2019-10-24 12:30:17 +00:00
(path "/592E1BC6")
2019-02-22 22:41:21 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
(fp_text reference "R7" (at -3.248 0.04) (layer "F.SilkS") hide
2019-02-22 22:41:21 +00:00
(effects (font (size 0.8 0.8) (thickness 0.2)))
)
2019-10-24 12:30:17 +00:00
(fp_text value "120" (at 0 1.4) (layer "F.Fab")
2019-02-22 22:41:21 +00:00
(effects (font (size 1 1) (thickness 0.15)))
)
2019-10-24 12:30:17 +00:00
(fp_line (start 1.3 -0.6) (end 1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 -0.6) (end -1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 0.6) (end 1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 -0.6) (end 1.3 -0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start -0.5 -0.4) (end -0.5 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.5 -0.4) (end 0.5 0.4) (layer "F.SilkS") (width 0.15))
(pad "2" smd roundrect (at 0.75 0) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
(net 8 "+5V") (solder_mask_margin 0.1))
(pad "1" smd roundrect (at -0.75 0) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
2019-03-14 14:25:14 +00:00
(net 13 "Net-(C6-Pad2)") (solder_mask_margin 0.1))
2019-10-24 12:30:17 +00:00
(model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
2019-02-22 22:41:21 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
2019-02-22 14:34:44 +00:00
)
2017-10-26 11:45:37 +00:00
2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:R_0603" (layer "F.Cu") (tedit 5AC562FC) (tstamp 5C74706A)
2019-03-14 14:25:14 +00:00
(at 141.25 70.4)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
2019-10-24 12:30:17 +00:00
(path "/592E0847")
2019-02-22 14:34:44 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
(fp_text reference "R4" (at -3.248 0.04) (layer "F.SilkS") hide
2019-03-14 14:25:14 +00:00
(effects (font (size 0.8 0.8) (thickness 0.2)))
2019-02-22 14:34:44 +00:00
)
2019-10-24 12:30:17 +00:00
(fp_text value "100k" (at 0 1.4) (layer "F.Fab")
2019-02-23 00:18:23 +00:00
(effects (font (size 1 1) (thickness 0.15)))
2019-02-22 14:34:44 +00:00
)
2019-10-24 12:30:17 +00:00
(fp_line (start 1.3 -0.6) (end 1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 -0.6) (end -1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 0.6) (end 1.3 0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.3 -0.6) (end 1.3 -0.6) (layer "F.CrtYd") (width 0.05))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start -0.5 -0.4) (end -0.5 0.4) (layer "F.SilkS") (width 0.15))
(fp_line (start 0.5 -0.4) (end 0.5 0.4) (layer "F.SilkS") (width 0.15))
(pad "2" smd roundrect (at 0.75 0) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
2019-03-14 14:25:14 +00:00
(net 4 "Net-(C3-Pad2)") (solder_mask_margin 0.1))
2019-10-24 12:30:17 +00:00
(pad "1" smd roundrect (at -0.75 0) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
2019-03-14 14:25:14 +00:00
(net 3 "Net-(C3-Pad1)") (solder_mask_margin 0.1))
2019-10-24 12:30:17 +00:00
(model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
2019-02-22 14:34:44 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:R_0603" (layer "F.Cu") (tedit 5AC562FC) (tstamp 592E34B6)
2019-03-14 14:25:14 +00:00
(at 141.25 82.4)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
2019-10-24 12:30:17 +00:00
(path "/592E08D0")
2019-02-22 14:34:44 +00:00
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2019-10-24 12:30:17 +00:00
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2019-03-14 14:25:14 +00:00
(net 5 "Net-(C4-Pad2)") (solder_mask_margin 0.1))
2019-10-24 12:30:17 +00:00
(pad "1" smd roundrect (at -0.75 0) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
2019-03-14 14:25:14 +00:00
(net 6 "Net-(C4-Pad1)") (solder_mask_margin 0.1))
2019-10-24 12:30:17 +00:00
(model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
2019-03-14 14:25:14 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
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)
2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:R_0603" (layer "F.Cu") (tedit 5AC562FC) (tstamp 592E34A6)
2019-03-14 14:25:14 +00:00
(at 148.1 77.05 90)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
2019-10-24 12:30:17 +00:00
(path "/592E0DC4")
2019-03-14 14:25:14 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
(fp_text reference "R2" (at -3.248 0.04 90) (layer "F.SilkS") hide
2019-03-14 14:25:14 +00:00
(effects (font (size 0.8 0.8) (thickness 0.2)))
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2019-10-24 12:30:17 +00:00
(fp_text value "100k" (at 0 1.4 90) (layer "F.Fab")
2019-02-22 14:34:44 +00:00
(effects (font (size 1 1) (thickness 0.15)))
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2019-10-24 12:30:17 +00:00
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2019-03-14 14:25:14 +00:00
(net 2 "Net-(C2-Pad2)") (solder_mask_margin 0.1))
2019-10-24 12:30:17 +00:00
(pad "1" smd roundrect (at -0.75 0 90) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
(net 12 "2.5V") (solder_mask_margin 0.1))
(model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
2019-03-14 14:25:14 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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2019-02-22 14:34:44 +00:00
)
2019-03-14 14:25:14 +00:00
)
2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:R_0603" (layer "F.Cu") (tedit 5AC562FC) (tstamp 592E3496)
2019-03-14 14:25:14 +00:00
(at 143.4 84.8 180)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
2019-10-24 12:30:17 +00:00
(path "/592E0C0B")
2019-03-14 14:25:14 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
(fp_text reference "R1" (at -3.248 0.04 180) (layer "F.SilkS") hide
2019-03-14 14:25:14 +00:00
(effects (font (size 0.8 0.8) (thickness 0.2)))
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2019-10-24 12:30:17 +00:00
(fp_text value "100k" (at 0 1.4 180) (layer "F.Fab")
2019-03-14 14:25:14 +00:00
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2019-10-24 12:30:17 +00:00
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2019-03-14 14:25:14 +00:00
(net 1 "Net-(C1-Pad2)") (solder_mask_margin 0.1))
2019-10-24 12:30:17 +00:00
(pad "1" smd roundrect (at -0.75 0 180) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
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(model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl"
2019-02-22 14:34:44 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
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2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:C_0603" (layer "F.Cu") (tedit 5AC56310) (tstamp 5C70E995)
2019-03-14 14:25:14 +00:00
(at 149.3 82.05 270)
2019-02-22 14:34:44 +00:00
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
2019-10-24 12:30:17 +00:00
(path "/5C7501E4")
2019-02-22 14:34:44 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
(fp_text reference "C12" (at -0.834 1.416 270) (layer "F.SilkS")
2019-02-22 14:34:44 +00:00
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2019-10-24 12:30:17 +00:00
(fp_text value "C" (at 0 1.4 270) (layer "F.Fab")
2019-02-22 14:34:44 +00:00
(effects (font (size 1 1) (thickness 0.15)))
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2019-10-24 12:30:17 +00:00
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(pad "2" smd roundrect (at 0.75 0 270) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
(net 7 "GND"))
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(net 8 "+5V"))
(model "${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl"
2019-02-22 14:34:44 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:C_0603" (layer "B.Cu") (tedit 5AC56310) (tstamp 5C70E985)
2019-02-22 14:34:44 +00:00
(at 157.6 71.2 90)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
2019-10-24 12:30:17 +00:00
(path "/5C74FF0F")
2019-02-22 14:34:44 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
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2019-02-22 14:34:44 +00:00
(effects (font (size 0.8 0.8) (thickness 0.2)) (justify mirror))
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2019-10-24 12:30:17 +00:00
(fp_text value "C" (at 0 -1.4 90) (layer "B.Fab")
2019-02-22 14:34:44 +00:00
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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2019-10-24 12:30:17 +00:00
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(pad "2" smd roundrect (at 0.75 0 90) (size 0.59 0.8) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.25)
(net 7 "GND"))
(pad "1" smd roundrect (at -0.75 0 90) (size 0.59 0.8) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.25)
(net 8 "+5V"))
(model "Capacitors_SMD.3dshapes/C_0603.wrl"
2019-02-22 14:34:44 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
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2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:C_0603" (layer "F.Cu") (tedit 5AC56310) (tstamp 5C70E975)
2019-03-14 14:25:14 +00:00
(at 143.3 71 90)
2019-02-22 14:34:44 +00:00
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
2019-10-24 12:30:17 +00:00
(path "/5C74F384")
2019-02-22 14:34:44 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
(fp_text reference "C10" (at -0.834 1.416 90) (layer "F.SilkS")
2019-02-22 14:34:44 +00:00
(effects (font (size 0.8 0.8) (thickness 0.2)))
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2019-10-24 12:30:17 +00:00
(fp_text value "C" (at 0 1.4 90) (layer "F.Fab")
2019-02-22 14:34:44 +00:00
(effects (font (size 1 1) (thickness 0.15)))
)
2019-10-24 12:30:17 +00:00
(fp_line (start 1.3 -0.6) (end 1.3 0.6) (layer "F.CrtYd") (width 0.05))
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(pad "2" smd roundrect (at 0.75 0 90) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
(net 7 "GND"))
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(net 8 "+5V"))
(model "Capacitors_SMD.3dshapes/C_0603.wrl"
2019-02-22 14:34:44 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
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2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:C_0603" (layer "F.Cu") (tedit 5AC56310) (tstamp 5C70CD32)
2019-03-14 14:25:14 +00:00
(at 146.9 73.85 270)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
2019-10-24 12:30:17 +00:00
(path "/5C724DC6")
2019-02-22 14:34:44 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
(fp_text reference "C8" (at -0.834 1.416 270) (layer "F.SilkS")
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(effects (font (size 0.8 0.8) (thickness 0.2)))
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2019-10-24 12:30:17 +00:00
(fp_text value "27p" (at 0 1.4 270) (layer "F.Fab")
2019-02-22 14:34:44 +00:00
(effects (font (size 1 1) (thickness 0.15)))
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2019-03-14 14:25:14 +00:00
(net 11 "Net-(C8-Pad2)"))
2019-10-24 12:30:17 +00:00
(pad "1" smd roundrect (at -0.75 0 270) (size 0.59 0.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
(net 12 "2.5V"))
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2019-02-22 14:34:44 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:C_0603" (layer "F.Cu") (tedit 5AC56310) (tstamp 5C748655)
2019-03-14 14:25:14 +00:00
(at 145.3365 71.6 180)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
2019-10-24 12:30:17 +00:00
(path "/5C724DBA")
2019-02-22 14:34:44 +00:00
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2019-10-24 12:30:17 +00:00
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2019-10-24 12:30:17 +00:00
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2019-03-14 14:25:14 +00:00
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2019-10-24 12:30:17 +00:00
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2019-03-14 14:25:14 +00:00
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2019-10-24 12:30:17 +00:00
(model "${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl"
2019-02-22 14:34:44 +00:00
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2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:C_0603" (layer "F.Cu") (tedit 5AC56310) (tstamp 592E3456)
2019-03-14 14:25:14 +00:00
(at 144.05 81.3)
2019-02-22 14:34:44 +00:00
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
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2019-10-24 12:30:17 +00:00
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2019-02-22 14:34:44 +00:00
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2019-03-14 14:25:14 +00:00
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2019-10-24 12:30:17 +00:00
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2019-02-22 14:34:44 +00:00
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2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:C_0603" (layer "F.Cu") (tedit 5AC56310) (tstamp 5C7459F8)
2019-03-14 14:25:14 +00:00
(at 147.7 79.35 180)
2019-02-22 14:34:44 +00:00
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
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2019-10-24 12:30:17 +00:00
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2019-02-22 14:34:44 +00:00
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2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:C_0603" (layer "F.Cu") (tedit 5AC56310) (tstamp 592E3436)
2019-03-14 14:25:14 +00:00
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(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
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2019-10-24 12:30:17 +00:00
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2019-10-24 12:30:17 +00:00
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2019-03-14 14:25:14 +00:00
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2019-10-24 12:30:17 +00:00
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2017-08-10 18:24:37 +00:00
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2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:C_0603" (layer "F.Cu") (tedit 5AC56310) (tstamp 5C746FF0)
2019-03-14 14:25:14 +00:00
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2019-10-24 12:30:17 +00:00
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2019-10-24 12:30:17 +00:00
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2019-10-24 12:30:17 +00:00
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2017-08-10 18:24:37 +00:00
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2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:C_0603" (layer "F.Cu") (tedit 5AC56310) (tstamp 592E3416)
2019-03-14 14:25:14 +00:00
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(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
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2019-10-24 12:30:17 +00:00
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2019-03-14 14:25:14 +00:00
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2019-10-24 12:30:17 +00:00
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2017-08-10 18:24:37 +00:00
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2019-10-24 12:30:17 +00:00
(module "stmbl-kicad-lib:C_0603" (layer "F.Cu") (tedit 5AC56310) (tstamp 5C8B1BE3)
2019-03-14 14:25:14 +00:00
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(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
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2019-10-24 12:30:17 +00:00
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2017-08-10 18:24:37 +00:00
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2019-10-24 12:30:17 +00:00
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2019-10-24 12:30:17 +00:00
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2019-10-24 12:30:17 +00:00
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2019-03-14 14:25:14 +00:00
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2019-10-24 12:30:17 +00:00
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(pad "6" smd rect (at -2.95 1.3 270) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask")
2019-03-14 14:25:14 +00:00
(net 4 "Net-(C3-Pad2)"))
2019-10-24 12:30:17 +00:00
(pad "7" smd rect (at -2.95 1.95 270) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask")
2019-03-14 14:25:14 +00:00
(net 3 "Net-(C3-Pad1)"))
2019-10-24 12:30:17 +00:00
(pad "8" smd rect (at 2.95 1.95 270) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask")
2019-03-14 14:25:14 +00:00
(net 6 "Net-(C4-Pad1)"))
2019-10-24 12:30:17 +00:00
(pad "9" smd rect (at 2.95 1.3 270) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask")
2019-03-14 14:25:14 +00:00
(net 5 "Net-(C4-Pad2)"))
2019-10-24 12:30:17 +00:00
(pad "10" smd rect (at 2.95 0.65 270) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask")
2019-03-14 14:25:14 +00:00
(net 1 "Net-(C1-Pad2)"))
2019-10-24 12:30:17 +00:00
(pad "11" smd rect (at 2.95 0 270) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask")
(net 7 "GND"))
(pad "12" smd rect (at 2.95 -0.65 270) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask")
2019-03-14 14:25:14 +00:00
(net 13 "Net-(C6-Pad2)"))
2019-10-24 12:30:17 +00:00
(pad "13" smd rect (at 2.95 -1.3 270) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask")
(net 12 "2.5V"))
(pad "14" smd rect (at 2.95 -1.95 270) (size 1.45 0.45) (layers "F.Cu" "F.Paste" "F.Mask")
(net 12 "2.5V"))
(model "${KISYS3DMOD}/Housings_SSOP.3dshapes/TSSOP-14_4.4x5mm_Pitch0.65mm.wrl"
2017-08-10 18:24:37 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
2019-10-24 12:30:17 +00:00
(model "${KISYS3DMOD}/Package_SO.3dshapes/TSSOP-14-1EP_4.4x5mm_P0.65mm.wrl"
2019-03-14 14:48:34 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
2017-08-10 18:24:37 +00:00
)
2019-10-24 12:30:17 +00:00
(module "stmbl:RJ45_LED" (layer "F.Cu") (tedit 58E701F3) (tstamp 5C74DEF3)
2019-03-14 14:48:34 +00:00
(at 169.5 77 270)
2019-10-24 12:30:17 +00:00
(path "/5D829B26")
(fp_text reference "J2" (at 6.194 16.462 270) (layer "F.SilkS")
2019-03-14 14:48:34 +00:00
(effects (font (size 1.5 1.5) (thickness 0.3)))
2017-08-10 18:24:37 +00:00
)
2019-10-24 12:30:17 +00:00
(fp_text value "RJ45_LED" (at -5 -1 270) (layer "F.Fab")
2019-03-14 14:48:34 +00:00
(effects (font (size 1 1) (thickness 0.15)))
2017-08-10 18:24:37 +00:00
)
2019-10-24 12:30:17 +00:00
(fp_circle (center -3.57 7.94) (end -3.556 6.858) (layer "B.SilkS") (width 0.15))
(fp_line (start 8.25 15.5) (end 8.25 0) (layer "F.SilkS") (width 0.15))
(fp_line (start -8.25 15.5) (end 8.25 15.5) (layer "F.SilkS") (width 0.15))
(fp_line (start -8.25 0) (end -8.25 15.5) (layer "F.SilkS") (width 0.15))
(fp_line (start 8.25 0) (end -8.25 0) (layer "F.SilkS") (width 0.15))
2019-03-14 14:48:34 +00:00
(pad "" np_thru_hole circle (at 6.35 5.4 270) (size 3.1 3.1) (drill 3.1) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(clearance 0.5))
2019-03-14 14:48:34 +00:00
(pad "" np_thru_hole circle (at -6.35 5.4 270) (size 3.1 3.1) (drill 3.1) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(clearance 0.5))
2019-10-24 12:30:17 +00:00
(pad "13" thru_hole circle (at 8.25 8.83 270) (size 1.9 1.9) (drill 1.5) (layers *.Cu *.Mask)
(net 7 "GND"))
(pad "13" thru_hole circle (at -8.25 8.83 270) (size 1.9 1.9) (drill 1.5) (layers *.Cu *.Mask)
(net 7 "GND"))
(pad "1" thru_hole circle (at -3.57 7.94 270) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 6 "Net-(C4-Pad1)"))
2019-10-24 12:30:17 +00:00
(pad "2" thru_hole circle (at -2.55 9.72 270) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
(net 12 "2.5V"))
(pad "3" thru_hole circle (at -1.53 7.94 270) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 3 "Net-(C3-Pad1)"))
2019-10-24 12:30:17 +00:00
(pad "4" thru_hole circle (at -0.51 9.72 270) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
(net 12 "2.5V"))
(pad "5" thru_hole circle (at 0.51 7.94 270) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 10 "Net-(C7-Pad1)"))
2019-10-24 12:30:17 +00:00
(pad "6" thru_hole circle (at 1.53 9.72 270) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
(net 12 "2.5V"))
(pad "7" thru_hole circle (at 2.55 7.94 270) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
(net 8 "+5V"))
(pad "8" thru_hole circle (at 3.57 9.72 270) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
(net 7 "GND"))
(pad "10" thru_hole circle (at 6.86 14.58 270) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 18 "Net-(J2-Pad10)"))
2019-10-24 12:30:17 +00:00
(pad "9" thru_hole circle (at 4.57 14.58 270) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 19 "Net-(J2-Pad9)"))
2019-10-24 12:30:17 +00:00
(pad "12" thru_hole circle (at -4.57 14.58 270) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 20 "Net-(J2-Pad12)"))
2019-10-24 12:30:17 +00:00
(pad "11" thru_hole circle (at -6.86 14.58 270) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 21 "Net-(J2-Pad11)"))
2019-10-24 12:30:17 +00:00
(model "${KIPRJMOD}/../lib/stmbl.pretty/RIA_AJT10L8813-011.wrl"
2017-08-10 18:24:37 +00:00
(at (xyz 0 0 0))
2019-03-14 14:25:14 +00:00
(scale (xyz 393.7 393.7 393.7))
(rotate (xyz -90 0 180))
2017-08-10 18:24:37 +00:00
)
)
2019-10-24 12:30:17 +00:00
(module "stmbl:RJ45_LED" (layer "F.Cu") (tedit 58E701F3) (tstamp 5C74DEDA)
2019-03-14 14:25:14 +00:00
(at 118 77 90)
2019-10-24 12:30:17 +00:00
(path "/5D7E41F6")
(fp_text reference "J1" (at 6.194 16.462 90) (layer "F.SilkS")
2019-03-14 14:25:14 +00:00
(effects (font (size 1.5 1.5) (thickness 0.3)))
2017-08-10 18:24:37 +00:00
)
2019-10-24 12:30:17 +00:00
(fp_text value "RJ45_LED" (at -5 -1 90) (layer "F.Fab")
2017-08-10 18:24:37 +00:00
(effects (font (size 1 1) (thickness 0.15)))
)
2019-10-24 12:30:17 +00:00
(fp_circle (center -3.57 7.94) (end -3.556 6.858) (layer "B.SilkS") (width 0.15))
(fp_line (start 8.25 15.5) (end 8.25 0) (layer "F.SilkS") (width 0.15))
(fp_line (start -8.25 15.5) (end 8.25 15.5) (layer "F.SilkS") (width 0.15))
(fp_line (start -8.25 0) (end -8.25 15.5) (layer "F.SilkS") (width 0.15))
(fp_line (start 8.25 0) (end -8.25 0) (layer "F.SilkS") (width 0.15))
2019-03-14 14:25:14 +00:00
(pad "" np_thru_hole circle (at 6.35 5.4 90) (size 3.1 3.1) (drill 3.1) (layers *.Cu *.Mask)
(clearance 0.5))
(pad "" np_thru_hole circle (at -6.35 5.4 90) (size 3.1 3.1) (drill 3.1) (layers *.Cu *.Mask)
(clearance 0.5))
2019-10-24 12:30:17 +00:00
(pad "13" thru_hole circle (at 8.25 8.83 90) (size 1.9 1.9) (drill 1.5) (layers *.Cu *.Mask)
(net 7 "GND"))
(pad "13" thru_hole circle (at -8.25 8.83 90) (size 1.9 1.9) (drill 1.5) (layers *.Cu *.Mask)
(net 7 "GND"))
(pad "1" thru_hole circle (at -3.57 7.94 90) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 5 "Net-(C4-Pad2)"))
2019-10-24 12:30:17 +00:00
(pad "2" thru_hole circle (at -2.55 9.72 90) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 1 "Net-(C1-Pad2)"))
2019-10-24 12:30:17 +00:00
(pad "3" thru_hole circle (at -1.53 7.94 90) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 4 "Net-(C3-Pad2)"))
2019-10-24 12:30:17 +00:00
(pad "4" thru_hole circle (at -0.51 9.72 90) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 11 "Net-(C8-Pad2)"))
2019-10-24 12:30:17 +00:00
(pad "5" thru_hole circle (at 0.51 7.94 90) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 9 "Net-(C7-Pad2)"))
2019-10-24 12:30:17 +00:00
(pad "6" thru_hole circle (at 1.53 9.72 90) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 2 "Net-(C2-Pad2)"))
2019-10-24 12:30:17 +00:00
(pad "7" thru_hole circle (at 2.55 7.94 90) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
(net 8 "+5V"))
(pad "8" thru_hole circle (at 3.57 9.72 90) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
(net 7 "GND"))
(pad "10" thru_hole circle (at 6.86 14.58 90) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 14 "Net-(J1-Pad10)"))
2019-10-24 12:30:17 +00:00
(pad "9" thru_hole circle (at 4.57 14.58 90) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 15 "Net-(J1-Pad9)"))
2019-10-24 12:30:17 +00:00
(pad "12" thru_hole circle (at -4.57 14.58 90) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 16 "Net-(J1-Pad12)"))
2019-10-24 12:30:17 +00:00
(pad "11" thru_hole circle (at -6.86 14.58 90) (size 1.3 1.3) (drill 0.9) (layers *.Cu *.Mask)
2019-03-14 14:25:14 +00:00
(net 17 "Net-(J1-Pad11)"))
2019-10-24 12:30:17 +00:00
(model "${KIPRJMOD}/../lib/stmbl.pretty/RIA_AJT10L8813-011.wrl"
2017-08-10 18:24:37 +00:00
(at (xyz 0 0 0))
2019-03-14 14:25:14 +00:00
(scale (xyz 393.7 393.7 393.7))
(rotate (xyz -90 0 180))
2017-08-10 18:24:37 +00:00
)
)
2019-10-24 12:30:17 +00:00
(module "Capacitor_Tantalum_SMD:CP_EIA-2012-15_AVX-P" (layer "F.Cu") (tedit 5B301BBE) (tstamp 5C70E9BB)
2019-03-14 14:25:14 +00:00
(at 137.3 73.05 90)
(descr "Tantalum Capacitor SMD AVX-P (2012-15 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/40182/tmch.pdf), generated with kicad-footprint-generator")
(tags "capacitor tantalum")
2019-10-24 12:30:17 +00:00
(path "/5C750E54")
2017-08-10 18:24:37 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
(fp_text reference "C14" (at 0 -1.58 90) (layer "F.SilkS")
2019-03-14 14:25:14 +00:00
(effects (font (size 1 1) (thickness 0.15)))
2017-08-10 18:24:37 +00:00
)
2019-10-24 12:30:17 +00:00
(fp_text value "CP" (at 0 1.58 90) (layer "F.Fab")
2017-08-10 18:24:37 +00:00
(effects (font (size 1 1) (thickness 0.15)))
)
2019-10-24 12:30:17 +00:00
(fp_line (start 1 -0.625) (end -0.6875 -0.625) (layer "F.Fab") (width 0.1))
(fp_line (start -0.6875 -0.625) (end -1 -0.3125) (layer "F.Fab") (width 0.1))
(fp_line (start -1 -0.3125) (end -1 0.625) (layer "F.Fab") (width 0.1))
(fp_line (start -1 0.625) (end 1 0.625) (layer "F.Fab") (width 0.1))
(fp_line (start 1 0.625) (end 1 -0.625) (layer "F.Fab") (width 0.1))
(fp_line (start 1 -0.785) (end -1.71 -0.785) (layer "F.SilkS") (width 0.12))
(fp_line (start -1.71 -0.785) (end -1.71 0.785) (layer "F.SilkS") (width 0.12))
(fp_line (start -1.71 0.785) (end 1 0.785) (layer "F.SilkS") (width 0.12))
(fp_line (start -1.7 0.88) (end -1.7 -0.88) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.7 -0.88) (end 1.7 -0.88) (layer "F.CrtYd") (width 0.05))
(fp_line (start 1.7 -0.88) (end 1.7 0.88) (layer "F.CrtYd") (width 0.05))
(fp_line (start 1.7 0.88) (end -1.7 0.88) (layer "F.CrtYd") (width 0.05))
(fp_text user "%R" (at 0 0 90) (layer "B.Fab")
2019-03-14 14:25:14 +00:00
(effects (font (size 0.5 0.5) (thickness 0.08)) (justify mirror))
)
2019-10-24 12:30:17 +00:00
(pad "2" smd roundrect (at 0.8875 0 90) (size 1.125 1.05) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.238095)
(net 7 "GND"))
(pad "1" smd roundrect (at -0.8875 0 90) (size 1.125 1.05) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.238095)
(net 8 "+5V"))
(model "${KISYS3DMOD}/Capacitor_Tantalum_SMD.3dshapes/CP_EIA-2012-15_AVX-P.wrl"
2017-08-10 18:24:37 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
2019-10-24 12:30:17 +00:00
(module "Capacitor_Tantalum_SMD:CP_EIA-2012-15_AVX-P" (layer "F.Cu") (tedit 5B301BBE) (tstamp 5C70E9A8)
2019-03-14 14:25:14 +00:00
(at 151.9 74.25 270)
(descr "Tantalum Capacitor SMD AVX-P (2012-15 Metric), IPC_7351 nominal, (Body size from: https://www.vishay.com/docs/40182/tmch.pdf), generated with kicad-footprint-generator")
(tags "capacitor tantalum")
2019-10-24 12:30:17 +00:00
(path "/5C750A44")
2017-08-10 18:24:37 +00:00
(attr smd)
2019-10-24 12:30:17 +00:00
(fp_text reference "C13" (at 0 -1.58 270) (layer "F.SilkS")
2019-03-14 14:25:14 +00:00
(effects (font (size 1 1) (thickness 0.15)))
2017-08-10 18:24:37 +00:00
)
2019-10-24 12:30:17 +00:00
(fp_text value "CP" (at 0 1.58 270) (layer "F.Fab")
2017-08-10 18:24:37 +00:00
(effects (font (size 1 1) (thickness 0.15)))
)
2019-10-24 12:30:17 +00:00
(fp_line (start 1 -0.625) (end -0.6875 -0.625) (layer "F.Fab") (width 0.1))
(fp_line (start -0.6875 -0.625) (end -1 -0.3125) (layer "F.Fab") (width 0.1))
(fp_line (start -1 -0.3125) (end -1 0.625) (layer "F.Fab") (width 0.1))
(fp_line (start -1 0.625) (end 1 0.625) (layer "F.Fab") (width 0.1))
(fp_line (start 1 0.625) (end 1 -0.625) (layer "F.Fab") (width 0.1))
(fp_line (start 1 -0.785) (end -1.71 -0.785) (layer "F.SilkS") (width 0.12))
(fp_line (start -1.71 -0.785) (end -1.71 0.785) (layer "F.SilkS") (width 0.12))
(fp_line (start -1.71 0.785) (end 1 0.785) (layer "F.SilkS") (width 0.12))
(fp_line (start -1.7 0.88) (end -1.7 -0.88) (layer "F.CrtYd") (width 0.05))
(fp_line (start -1.7 -0.88) (end 1.7 -0.88) (layer "F.CrtYd") (width 0.05))
(fp_line (start 1.7 -0.88) (end 1.7 0.88) (layer "F.CrtYd") (width 0.05))
(fp_line (start 1.7 0.88) (end -1.7 0.88) (layer "F.CrtYd") (width 0.05))
(fp_text user "%R" (at 0 0 270) (layer "F.Fab")
2019-03-14 14:25:14 +00:00
(effects (font (size 0.5 0.5) (thickness 0.08)))
)
2019-10-24 12:30:17 +00:00
(pad "2" smd roundrect (at 0.8875 0 270) (size 1.125 1.05) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.238095)
(net 7 "GND"))
(pad "1" smd roundrect (at -0.8875 0 270) (size 1.125 1.05) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.238095)
(net 8 "+5V"))
(model "${KISYS3DMOD}/Capacitor_Tantalum_SMD.3dshapes/CP_EIA-2012-15_AVX-P.wrl"
2017-08-10 18:24:37 +00:00
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
2019-10-24 12:30:17 +00:00
(module "stmbl:RM3.81_1x4_UP" (layer "F.Cu") (tedit 5C692749) (tstamp 5C74E331)
2019-03-14 14:25:14 +00:00
(at 130.5 71.38 270)
2019-10-24 12:30:17 +00:00
(path "/5C702B75")
(fp_text reference "J4" (at 0 2.5 270) (layer "F.SilkS") hide
2019-03-14 14:25:14 +00:00
(effects (font (size 1.5 1.5) (thickness 0.3)))
2017-08-10 18:24:37 +00:00
)
2019-10-24 12:30:17 +00:00
(fp_text value "CONN_01X04" (at 0 -2 270) (layer "F.SilkS") hide
2017-08-10 18:24:37 +00:00
(effects (font (size 1 1) (thickness 0.15)))
)
2019-10-24 12:30:17 +00:00
(fp_line (start -2.5 3) (end 13.93 3) (layer "F.SilkS") (width 0.15))
(fp_line (start 13.93 3) (end 13.93 -4) (layer "F.SilkS") (width 0.15))
(fp_line (start 13.93 -4) (end -2.5 -4) (layer "F.SilkS") (width 0.15))
(fp_line (start -2.5 -4) (end -2.5 3) (layer "F.SilkS") (width 0.15))
(fp_line (start -1.905 6.5) (end 13.335 6.5) (layer "Margin") (width 0.15))
(fp_line (start 13.335 6.5) (end 13.335 -5) (layer "Margin") (width 0.15))
(fp_line (start 13.335 -5) (end -1.905 -5) (layer "Margin") (width 0.15))
(fp_line (start -1.905 -5) (end -1.905 6.5) (layer "Margin") (width 0.15))
(fp_line (start -1.905 3) (end -1.905 -4) (layer "F.SilkS") (width 0.15))
(fp_line (start 1.905 3) (end 1.905 -4) (layer "F.SilkS") (width 0.15))
(fp_line (start -1.905 -3) (end -0.905 -3) (layer "F.SilkS") (width 0.15))
(fp_line (start 1.905 -3) (end 0.905 -3) (layer "F.SilkS") (width 0.15))
(fp_line (start -1 4) (end 1 4) (layer "Margin") (width 0.15))
(fp_line (start 1 4) (end 1 1.5) (layer "Margin") (width 0.15))
(fp_line (start 1 1.5) (end -1 1.5) (layer "Margin") (width 0.15))
(fp_line (start -1 1.5) (end -1 4) (layer "Margin") (width 0.15))
(fp_line (start 1.905 3) (end 1.905 -4) (layer "F.SilkS") (width 0.15))
(fp_line (start 5.715 3) (end 5.715 -4) (layer "F.SilkS") (width 0.15))
(fp_line (start 1.905 -3) (end 2.905 -3) (layer "F.SilkS") (width 0.15))
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