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mirror of https://github.com/rene-dev/stmbl.git synced 2024-12-19 07:02:13 +00:00
Commit Graph

257 Commits

Author SHA1 Message Date
Rene Hopf
f2d4f936a9 Merge branch 'master' into end_qtgui 2016-02-28 18:34:50 +01:00
crinq
f5e94a5858 v3.4 2016-02-21 20:22:58 +01:00
crinq
370ffc620a stmbl 3.4 2016-02-12 23:42:28 +01:00
Rene Hopf
e486c4ae9a update voltage regulator 2016-02-05 05:43:02 +01:00
Rene Hopf
2c8b918223 marked resolver ref signal as deprecated 2016-01-30 05:35:51 +01:00
crinq
4fc4131005 openscad model 2016-01-27 09:54:34 +01:00
crinq
640f787870 openscad model 2016-01-26 02:25:20 +01:00
crinq
109938c159 openscad model 2016-01-26 02:08:26 +01:00
crinq
eab13a9900 openscad model 2016-01-26 01:52:56 +01:00
crinq
ba2a699399 openscad model 2016-01-26 01:33:10 +01:00
crinq
d3adecd0a5 openscad model 2016-01-26 00:56:15 +01:00
crinq
58f22c32b4 openscad model 2016-01-25 23:26:01 +01:00
crinq
3293a7ca3a + openscad model 2016-01-25 21:35:45 +01:00
Rene Hopf
7e1f9db78f clip 2016-01-24 18:05:15 +01:00
Rene Hopf
86d6148585 pin file for bob 2016-01-19 21:44:20 +01:00
sync
61b7125fec Add PDF schematic 2016-01-19 18:03:52 +01:00
crinq
bdcad6cea6 v3.4 pdf 2016-01-18 16:31:57 +01:00
sync
55f31c2b8d Add troller pcb data 2016-01-17 16:19:49 +01:00
Rene Hopf
d7212c7c06 troller drawing 2016-01-15 15:08:43 +01:00
End
325c27f3c4 * fixed messup 2016-01-11 20:52:17 +01:00
Rene Hopf
5bb0e72318 Merge pull request #24 from rene-dev/bob
Bob
2016-01-02 18:53:58 +01:00
crinq
bb51a7207e hw v3.4 2015-12-30 06:43:48 +01:00
crinq
fe22230ba5 v3.4 pdf 2015-12-29 04:28:41 +01:00
crinq
ac2d825e60 hw v3.4 +testpoints 2015-12-28 21:06:32 +01:00
crinq
4f967b4e12 hw v3.4 2015-12-28 18:22:58 +01:00
crinq
6658b0c215 func, pin mapping f4 2015-12-27 21:18:26 +01:00
crinq
19a4113477 +pdf 2015-12-13 03:54:47 +01:00
crinq
b7357bfe39 +f1 3.3V, viper fix 2015-12-13 01:43:06 +01:00
crinq
e8b19dc709 +pdf 2015-12-10 15:36:29 +01:00
crinq
d64865d0a0 expand io header 2015-12-10 15:31:50 +01:00
crinq
7f21b7c220 io +spi 2015-12-10 07:08:57 +01:00
crinq
adafa906c2 +cur sense, f4 pin remap 2015-12-10 06:40:34 +01:00
crinq
8396389e34 +iram256 2015-12-10 01:47:58 +01:00
crinq
224943a5bd hv fix 2015-12-08 18:52:25 +01:00
crinq
ad45fd50b7 fb fix, cleanup 2015-12-08 04:16:42 +01:00
crinq
660ced1d38 kicad -> pdf 2015-12-08 04:04:21 +01:00
crinq
a3cad02723 f4 usb fix 2015-12-08 04:02:26 +01:00
crinq
607797b007 pcm jumper fix 2015-12-08 03:52:25 +01:00
Sync
8aff5fc4e4 Schematics as pdf 2015-12-08 03:44:16 +01:00
crinq
9831317aa1 gitignore kicad bak files, hv tx fix 2015-12-08 03:37:36 +01:00
crinq
43b887b12e stmbl hw v3.4 first schematic 2015-12-08 03:18:40 +01:00
Sync
82d684e585 Swapped RX/TX 2015-12-01 00:46:52 +01:00
Sync
0a21c14e17 Small changes. 2015-12-01 00:05:06 +01:00
Sync
d04f80a04b Isolated SmartSerial channels.
Functional isolation only! The clearances are not enough to provide safe clearance for mains voltage.
2015-11-30 21:55:58 +01:00
Sync
cfa4d9a710 Hole sizes. 2015-11-30 21:16:31 +01:00
Sync
670f3b2f22 Small changes. 2015-11-30 20:51:54 +01:00
Sync
181ed2b7a3 Finalized rectifier. 2015-11-30 00:54:07 +01:00
Sync
3d5f3e6c88 Forgot schematic. 2015-11-30 00:37:42 +01:00
Sync
b519572f90 Final version. 2015-11-30 00:35:28 +01:00
sync
94e4e46f95 Major routing done 2015-11-22 01:17:10 +01:00