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mirror of https://github.com/rene-dev/stmbl.git synced 2024-12-20 23:52:15 +00:00
Commit Graph

14 Commits

Author SHA1 Message Date
sync
7146dead08 Current Rectifier state 2017-11-07 19:33:16 +01:00
sync
b94801be18 More changes to the rectifier 2017-10-27 21:40:41 +02:00
sync
2392b2b228 Remove resistors and reverse estop socket. 2017-10-26 13:43:50 +02:00
sync
674ee56096 Small changes 2017-08-28 18:40:28 +02:00
sync
b9868dca56 Small changes 2017-08-14 20:43:52 +02:00
sync
75e85ef5c0 Remove isolated UART 2017-08-14 12:42:36 +02:00
sync
dd99f0b17d Fixed some clearance issues 2017-08-14 12:13:01 +02:00
sync
d57ac4732e Kicad ate the correct net for the GNDPWR trace 2017-07-30 14:49:46 +02:00
sync
f66d9a9fff Change mounting hole size 2017-07-29 19:52:58 +02:00
sync
cf3ccc61f6 Fix SWD again. Some small changes. 2017-07-27 20:24:38 +02:00
sync
cb31486099 Small changes. Fixed SWD pinout + zones + caps on VPP 2017-07-27 19:59:25 +02:00
sync
be396beab7 First full route of the rectifier board with braking resistor.
Clearances should be large enough for mains applications.
Some strange junctions remain.
2017-07-16 23:18:20 +02:00
Rene Hopf
433a4216e6 rectifier 2 2017-04-05 14:14:35 +02:00
Rene Hopf
cbde12b34b rect2 2017-04-05 00:12:11 +02:00