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mirror of https://github.com/rene-dev/stmbl.git synced 2024-12-30 04:24:29 +00:00
Commit Graph

220 Commits

Author SHA1 Message Date
crinq
dfdd8a8711 v4.0 2016-11-20 16:33:01 +01:00
crinq
468c870d2b v4.0 2016-11-20 03:27:12 +01:00
crinq
8d10bb73c6 v4.0 2016-11-19 22:15:44 +01:00
Rene Hopf
7ab402ab6f usb polygon 2016-11-19 19:21:12 +01:00
Rene Hopf
8b5548d4f2 v4 2016-11-19 19:07:18 +01:00
Rene Hopf
f747a5640c v4.0 hv 3v3 15v routing 2016-11-19 14:32:03 +01:00
crinq
0750d41910 v4.0 2016-11-19 03:04:34 +01:00
crinq
270a99a244 v4.0 2016-11-19 02:46:05 +01:00
Sync
6a6a8e93be Change USB ESD 2016-11-19 02:39:35 +01:00
crinq
dde04c2bfc v4.0 2016-11-19 01:43:46 +01:00
crinq
3603c3c405 v4.0 2016-11-18 21:48:26 +01:00
crinq
4cd8f9be9d v4.0 2016-11-18 21:29:27 +01:00
Sync
ffd45fc641 Add CS 2016-11-18 21:16:16 +01:00
crinq
4b6e220449 v4.0 2016-11-17 03:53:12 +01:00
Sync
e18b6c6d2f Change RS485 transceiver supply to 5V 2016-11-17 02:41:44 +01:00
crinq
68091b37bf v4.0 2016-11-16 11:40:13 +01:00
sync
c1434be557 Add text 2016-11-15 16:28:09 +01:00
Sync
887cea88f7 Done, for now. 2016-11-13 03:01:27 +01:00
Sync
4371cba561 Almost done 2016-11-13 00:37:06 +01:00
sync
d653ab1b31 Routing 2016-11-11 18:24:07 +01:00
crinq
0b4efcd276 v4.0 2016-11-11 05:28:45 +01:00
crinq
29b4639daf v4.0 2016-11-10 03:48:41 +01:00
crinq
ce6f566f0e v4.0 2016-11-08 07:18:16 +01:00
crinq
07784c8e10 v4.0 2016-11-08 06:47:52 +01:00
crinq
a6e66aa354 v4.0 2016-11-08 01:52:06 +01:00
crinq
5f83b6c068 v4.0 2016-11-08 00:31:18 +01:00
crinq
4b1b15f83f v4.0 2016-11-07 21:47:30 +01:00
crinq
974fdab3f1 v4.0 mapping 2016-11-07 19:39:20 +01:00
crinq
ff69aa8b3e v4.0 pdf 2016-11-06 19:04:19 +01:00
Rene Hopf
aa9aacc940 Merge branch 'master' into newstuff 2016-11-03 10:42:50 +01:00
crinq
7db0d12522 v4.0 2016-10-31 07:12:59 +01:00
sync
02326f5426 More stuff 2016-10-28 19:27:30 +02:00
crinq
17646b211c v4.0 2016-10-24 07:16:09 +02:00
Rene Hopf
9ec941255b Merge branch 'master' into bob 2016-10-20 15:13:04 +02:00
sync
4780790abe WIP 2016-10-20 15:06:41 +02:00
sync
c708c50753 swap plugs 2016-10-18 23:50:01 +02:00
crinq
a187211ce0 v4.0 2016-10-18 04:16:43 +02:00
crinq
1506e7f4a5 v4.0 2016-10-18 04:13:56 +02:00
sync
39edd99f18 Layout 2016-10-16 22:00:16 +02:00
sync
8d5520797f Add flash
Move STM32
2016-10-16 21:56:27 +02:00
crinq
31a9213bde Merge branch 'master' of github.com:rene-dev/stmbl 2016-10-15 02:15:11 +02:00
Nico Stute
c8e11f948c Update periph.md 2016-10-15 01:20:24 +02:00
Nico Stute
921e6a2b76 Update periph.md 2016-10-15 01:19:53 +02:00
Nico Stute
3c16bea744 Update periph.md 2016-10-15 01:17:56 +02:00
Nico Stute
a22c446ec5 Create periph.md 2016-10-15 01:16:09 +02:00
Nico Stute
528c4dd1d4 Update pinout.md 2016-10-15 01:03:42 +02:00
Sync
d086688be7 Change USB-A to USB-A-vertical 2016-10-13 18:11:38 +02:00
Sync
09d9efc8a2 Yes yes git and the like.
Fix crystal symbol
Add flash
Add Vreg
Add USB-A

Still WIP...
2016-10-13 15:34:43 +02:00
crinq
4107fec022 v4.0 2016-10-09 13:04:19 +02:00
crinq
1053c31dca Merge branch 'master' of github.com:rene-dev/stmbl 2016-10-08 22:22:17 +02:00
crinq
f508e091bc v4.0 2016-10-08 22:22:00 +02:00
Nico Stute
087449e5aa Update pinout.md 2016-10-08 21:14:08 +02:00
crinq
cd95a82de5 v4.0 2016-10-08 20:11:47 +02:00
crinq
6b97027075 v4.0 2016-10-07 21:25:57 +02:00
crinq
34da504721 v4.0 2016-10-06 06:16:03 +02:00
Sync
1ab02195c4 not gonna change it again 2016-10-06 03:21:58 +02:00
Sync
00f7b92b63 layout 2016-10-06 02:01:33 +02:00
Sync
d86a9b6a0a more layouting 2016-10-01 03:20:57 +02:00
Sync
772813585b squiggly lines 2016-10-01 01:37:57 +02:00
Sync
b06b6effb4 fix library stuff 2016-10-01 00:03:40 +02:00
Sync
2fcfde1349 change phy schematic 2016-09-30 23:52:49 +02:00
crinq
f52000bc4e v4.0 2016-09-30 22:57:25 +02:00
sync
7182d7c657 vias 2016-09-29 23:15:28 +02:00
sync
8a96fce655 fiddle traces 2016-09-29 22:08:49 +02:00
sync
32a6a31f95 some layouting 2016-09-29 21:55:08 +02:00
sync
99bcaf4207 add rmii testpoints 2016-09-29 19:38:42 +02:00
sync
3635f96974 add vcap/vref/vbat 2016-09-29 19:30:34 +02:00
sync
9836f9298c add selectable MCO 2016-09-29 19:26:05 +02:00
sync
3da1d62140 changed over to disco header 2016-09-29 14:22:49 +02:00
Rene Hopf
3f70ada1db Merge branch 'master' into newstuff
Conflicts:
	Makefile
2016-09-19 11:52:38 +02:00
crinq
f010185f6d path fix 2016-09-13 05:09:56 +02:00
crinq
cef9e0fe66 v4.0 2016-09-13 04:25:34 +02:00
crinq
f0cd5b3b49 v4.0 2016-09-12 22:53:06 +02:00
crinq
aa7471871e v4.0 2016-09-11 02:14:55 +02:00
sync
613dccad05 Chang RJ45 footprint to represent the right one.
Add pin headers.
Add reset button.
Add power supply.
2016-08-29 19:15:30 +02:00
sync
8009cfcd33 Added power supply 2016-08-27 17:28:30 +02:00
Sync
43afb586e6 Changed over to RMII, I think... 2016-08-27 16:33:57 +02:00
sync
72f5b5f6e5 Initial commit ethernet platform 2016-08-11 20:33:12 +02:00
crinq
d7b27085f8 v4.0 2016-08-11 06:27:49 +02:00
Nico Stute
28401951f1 Update pinout.md 2016-08-11 02:15:37 +02:00
crinq
b7dba0226f v4.0 pinout 2016-08-11 02:10:03 +02:00
sync
f27dc3752b Wip 2016-07-27 21:13:05 +02:00
Rene Hopf
1592cba6c4 Merge branch 'master' into newstuff 2016-07-07 14:49:53 +02:00
Rene Hopf
a89dd56bcc Merge branch 'master' into newstuff 2016-07-07 14:46:55 +02:00
crinq
7ac0b99982 v4.0 2016-07-02 04:16:55 +02:00
crinq
d2da6b4e3e v4.0 2016-07-01 07:53:00 +02:00
crinq
263b14b184 v4.0 2016-07-01 02:50:15 +02:00
crinq
cd62dfc770 v4.0 2016-07-01 02:49:27 +02:00
crinq
e65b120ac5 v4.0 2016-06-30 16:53:27 +02:00
crinq
cb2b23cd14 v4.0 2016-06-30 16:47:18 +02:00
Rene Hopf
64ceb1e3b1 rev type 2016-06-17 01:29:49 +02:00
Rene Hopf
439230bd8c scale fix 2016-06-17 01:25:12 +02:00
Rene Hopf
a7bf20e1d1 sserial position feedback working 2016-06-17 00:37:30 +02:00
sync
ab6dbfa839 More stuff. 2016-06-03 20:34:57 +02:00
sync
2112dc8a3f More routing + schematic changes 2016-05-30 16:02:12 +02:00
sync
35abefb32b Forgot file, I think.... 2016-05-24 23:55:33 +02:00
sync
310609be28 Next gen Breakout Board 2016-05-24 23:54:44 +02:00
crinq
1adde90a8d Merge branch 'master' of github.com:rene-dev/stmbl 2016-05-22 18:13:39 +02:00
crinq
c5d0ff2766 v4.0 2016-05-22 18:13:17 +02:00
Rene Hopf
34f26ad6cc sserial observer vel_ff 2016-05-22 18:09:11 +02:00