Contents
- STM32F4xx CMSIS
update History
- License
STM32F4xx CMSIS
update HistoryV1.6.0 / 10-July-2015
Main
Changes
V1.5.0 / 06-March-2015
Main
Changes
V1.4.0 / 04-August-2014
Main
Changes
V1.3.0 / 08-November-2013
Main
Changes
V1.2.1 /
19-September-2013
Main
Changes
V1.2.0 /
11-September-2013
Main
Changes
V1.1.0 /
11-January-2013
Main
Changes
- Official release for STM32F427x/437x devices.
- stm32f4xx.h
- Update product define: replace
"#define STM32F4XX" by "#define STM32F40XX" for STM32F40x/41x devices
- Add new product define: "#define
STM32F427X" for STM32F427x/437x devices.
- Add new startup files "startup_stm32f427x.s" for all toolchains
- rename startup files "startup_stm32f4xx.s" by "startup_stm32f40xx.s" for all toolchains
- system_stm32f4xx.c
- Prefetch Buffer enabled
- Add reference to STM32F427x/437x
devices and STM324x7I_EVAL board
- SystemInit_ExtMemCtl()
function
- Add configuration of missing FSMC
address and data lines
- Change memory type to SRAM instead
of PSRAM (PSRAM is available only on STM324xG-EVAL RevA) and update timing
values
V1.0.2 / 05-March-2012
Main
Changes
- All source files: license disclaimer text update and add link to the License file on ST Internet.
V1.0.1 / 28-December-2011Main
Changes
- All source files: update disclaimer to add reference to the new license agreement
- stm32f4xx.h
- Correct bit definition: RCC_AHB2RSTR_HSAHRST changed to RCC_AHB2RSTR_HASHRST
V1.0.0 / 30-September-2011Main
Changes
- First official release for STM32F40x/41x devices
- Add startup file for TASKING toolchain
- system_stm32f4xx.c: driver's comments update
V1.0.0RC2 / 26-September-2011Main
Changes
- Official version (V1.0.0) Release Candidate2 for STM32F40x/41x devices
- stm32f4xx.h
- Add define for Cortex-M4 revision __CM4_REV
- Correct RCC_CFGR_PPRE2_DIV16 bit (in RCC_CFGR register) value to 0x0000E000
- Correct some bits definition to be in line with naming used in the Reference Manual (RM0090)
- GPIO_OTYPER_IDR_x changed to GPIO_IDR_IDR_x
- GPIO_OTYPER_ODR_x changed to GPIO_ODR_ODR_x
- SYSCFG_PMC_MII_RMII changed to SYSCFG_PMC_MII_RMII_SEL
- RCC_APB2RSTR_SPI1 changed to RCC_APB2RSTR_SPI1RST
- DBGMCU_APB1_FZ_DBG_IWDEG_STOP changed to DBGMCU_APB1_FZ_DBG_IWDG_STOP
- PWR_CR_PMODE changed to PWR_CR_VOS
- PWR_CSR_REGRDY changed to PWR_CSR_VOSRDY
- Add new define RCC_AHB1ENR_CCMDATARAMEN
- Add new defines SRAM2_BASE, CCMDATARAM_BASE and BKPSRAM_BASE
- GPIO_TypeDef structure: in the comment change AFR[2] address mapping to 0x20-0x24 instead of 0x24-0x28
- system_stm32f4xx.c
- SystemInit(): add code to enable the FPU
- SetSysClock(): change PWR_CR_PMODE by PWR_CR_VOS
- SystemInit_ExtMemCtl(): remove commented values
- startup (for all compilers)
- Delete code used to enable the FPU (moved to system_stm32f4xx.c file)
- File’s header updated
V1.0.0RC1 / 25-August-2011Main
Changes
- Official version (V1.0.0) Release Candidate1 for STM32F4xx devices
License
Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); You may not use this package except in compliance with the License. You may obtain a copy of the License at:
Unless
required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See
the License for the specific language governing permissions and
limitations under the License.
For
complete documentation on STM32 Microcontrollers
visit www.st.com/STM32
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