mirror of
https://github.com/rene-dev/stmbl.git
synced 2024-12-19 07:02:13 +00:00
260 lines
5.8 KiB
Plaintext
260 lines
5.8 KiB
Plaintext
Version 4
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SHEET 1 5176 960
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WIRE 3744 -16 2928 -16
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WIRE 3728 16 3680 16
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WIRE 3456 64 3328 64
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WIRE 3536 64 3456 64
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WIRE 3632 64 3616 64
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WIRE 3680 64 3680 16
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WIRE 3680 64 3632 64
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WIRE 3456 80 3456 64
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WIRE 3632 80 3632 64
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WIRE 3744 96 3744 -16
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WIRE 3680 112 3680 64
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WIRE 3712 112 3680 112
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WIRE 2928 128 2928 -16
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WIRE 2928 128 2848 128
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WIRE 3808 128 3808 16
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WIRE 3808 128 3776 128
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WIRE 3824 128 3808 128
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WIRE 4528 128 3968 128
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WIRE 3712 144 3680 144
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WIRE 3904 160 3904 128
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WIRE 3456 176 3456 160
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WIRE 3456 176 3360 176
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WIRE 3536 176 3456 176
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WIRE 3632 176 3632 144
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WIRE 3632 176 3616 176
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WIRE 3680 176 3680 144
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WIRE 3680 176 3632 176
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WIRE 3328 192 3328 64
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WIRE 3056 224 2960 224
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WIRE 3680 224 3680 176
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WIRE 3680 224 3184 224
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WIRE 1696 240 1600 240
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WIRE 3904 240 3792 240
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WIRE 4000 240 3904 240
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WIRE 1600 304 1600 240
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WIRE 2848 304 2848 128
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WIRE 2960 304 2960 224
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WIRE 3104 304 3104 224
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WIRE 3104 304 3056 304
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WIRE 3360 304 3360 176
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WIRE 4528 304 4528 128
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WIRE 3104 320 3104 304
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WIRE 1536 384 1296 384
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WIRE 1600 384 1536 384
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WIRE 1856 384 1600 384
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WIRE 1984 384 1856 384
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WIRE 2848 384 1984 384
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WIRE 2960 384 2848 384
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WIRE 3056 384 2960 384
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WIRE 3104 384 3056 384
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WIRE 3136 384 3104 384
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WIRE 3744 384 3744 160
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WIRE 3744 384 3136 384
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WIRE 3792 384 3792 304
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WIRE 3792 384 3744 384
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WIRE 3904 384 3904 320
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WIRE 3904 384 3792 384
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WIRE 4112 384 3904 384
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WIRE 4256 384 4112 384
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WIRE 4336 384 4256 384
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WIRE 4528 384 4336 384
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WIRE 1296 400 1296 384
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WIRE 3360 416 3360 304
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WIRE 3616 416 3360 416
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WIRE 1696 496 1696 240
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WIRE 1856 496 1856 448
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WIRE 1856 496 1696 496
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WIRE 1984 496 1984 448
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WIRE 1984 496 1856 496
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WIRE 2608 496 1984 496
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WIRE 3328 496 3328 192
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WIRE 3600 496 3328 496
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WIRE 2608 512 2608 496
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WIRE 3328 528 3200 528
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WIRE 3600 528 3600 496
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WIRE 3600 528 3328 528
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WIRE 3328 560 3328 528
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WIRE 2608 592 2304 592
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WIRE 2704 592 2608 592
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WIRE 2768 592 2704 592
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WIRE 2304 640 2304 592
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WIRE 2608 672 2384 672
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WIRE 2704 672 2608 672
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WIRE 2768 672 2704 672
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WIRE 3328 672 3328 640
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WIRE 3424 672 3328 672
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WIRE 3504 672 3424 672
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WIRE 3616 672 3616 416
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WIRE 3616 672 3504 672
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WIRE 1536 752 1536 384
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WIRE 2144 752 1536 752
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WIRE 2304 752 2304 720
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WIRE 2304 752 2144 752
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WIRE 2384 752 2304 752
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WIRE 2608 752 2384 752
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WIRE 3136 768 3136 384
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WIRE 3200 768 3136 768
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WIRE 3328 768 3200 768
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FLAG 1296 400 0
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FLAG 4000 240 sig
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FLAG 3808 128 op_out
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FLAG 3328 192 in-
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FLAG 4336 304 0V
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FLAG 4528 304 3.3V
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FLAG 4256 304 in
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FLAG 4256 464 in_d
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FLAG 2704 672 B
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FLAG 2704 592 A
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FLAG 3360 304 in+
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FLAG 4112 304 ref
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FLAG 2144 672 r_in
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SYMBOL ind2 2752 576 R0
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SYMATTR InstName L1
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SYMATTR Value 7m
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SYMATTR Type ind
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SYMATTR SpiceLine Rser=30
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SYMBOL ind2 3312 544 R0
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SYMATTR InstName L2
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SYMATTR Value 7m
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SYMATTR SpiceLine Rser=70
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SYMBOL cap 1840 384 R0
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SYMATTR InstName C2
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SYMATTR Value 100n
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SYMBOL polcap 1968 384 R0
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SYMATTR InstName C3
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SYMATTR Value 500<30>
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SYMBOL voltage 2384 656 R0
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SYMATTR InstName V1
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SYMATTR Value PULSE(0 5 0 0 0 0.05m 0.1m)
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SYMATTR SpiceLine Rser=5
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SYMBOL res 3824 0 R90
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WINDOW 0 0 56 VBottom 2
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WINDOW 3 32 56 VTop 2
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SYMATTR InstName R12
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SYMATTR Value 2.4k
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SYMBOL cap 3088 320 R0
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SYMATTR InstName C7
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SYMATTR Value 4.7<EFBFBD>
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SYMBOL res 3888 224 R0
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SYMATTR InstName R8
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SYMATTR Value 2.4k
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SYMBOL res 3888 144 R0
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SYMATTR InstName R11
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SYMATTR Value 470
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SYMBOL cap 3776 240 R0
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SYMATTR InstName C10
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SYMATTR Value 1n
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SYMBOL voltage 3328 672 R0
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SYMATTR InstName V2
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SYMATTR Value SINE(2.5 0 700 0)
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SYMATTR SpiceLine Rser=1
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SYMBOL res 3440 64 R0
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SYMATTR InstName R21
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SYMATTR Value 120
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SYMBOL res 3632 48 R90
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WINDOW 0 0 56 VBottom 2
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WINDOW 3 32 56 VTop 2
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SYMATTR InstName R1
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SYMATTR Value 1k
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SYMBOL res 3632 160 R90
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WINDOW 0 0 56 VBottom 2
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WINDOW 3 32 56 VTop 2
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SYMATTR InstName R7
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SYMATTR Value 1k
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SYMBOL res 3200 208 R90
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WINDOW 0 0 56 VBottom 2
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WINDOW 3 32 56 VTop 2
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SYMATTR InstName R20
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SYMATTR Value 2.4k
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SYMBOL cap 3616 80 R0
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SYMATTR InstName C9
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SYMATTR Value 18p
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SYMBOL voltage 3504 576 R0
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SYMATTR InstName V5
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SYMATTR Value SINE(0 1 1000 0 0)
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SYMATTR SpiceLine Rser=24
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SYMBOL voltage 2960 288 R0
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SYMATTR InstName V7
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SYMATTR Value 3.3
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SYMATTR SpiceLine Rser=1
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SYMBOL voltage 1600 288 R0
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SYMATTR InstName V8
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SYMATTR Value 5
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SYMATTR SpiceLine Rser=1
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SYMBOL voltage 2848 288 R0
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SYMATTR InstName V9
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SYMATTR Value 12
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SYMATTR SpiceLine Rser=1
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SYMBOL voltage 4336 288 R0
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SYMATTR InstName V12
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SYMATTR Value 0
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SYMATTR SpiceLine Rser=1
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SYMBOL voltage 4528 288 R0
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SYMATTR InstName V13
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SYMATTR Value 3.3
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SYMATTR SpiceLine Rser=1
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SYMBOL res 2592 576 R0
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SYMATTR InstName R10
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SYMATTR Value 120
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SYMBOL bv 4256 288 R0
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SYMATTR InstName B1
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SYMATTR Value V=V(in+) - V(in-)
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SYMBOL res 2592 656 R0
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SYMATTR InstName R13
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SYMATTR Value 390
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SYMBOL res 2592 496 R0
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SYMATTR InstName R15
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SYMATTR Value 390
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SYMBOL voltage 2304 624 R0
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SYMATTR InstName V14
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SYMATTR Value PULSE(5 0 0 0 0 0.05m 0.1m)
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SYMATTR SpiceLine Rser=5
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SYMBOL voltage 3424 576 R0
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SYMATTR InstName V3
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SYMATTR Value SINE(0 1 1000 0 0)
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SYMATTR SpiceLine Rser=1
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SYMBOL bv 4256 480 R180
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WINDOW 0 24 96 Left 2
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WINDOW 3 24 16 Left 2
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SYMATTR InstName B2
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SYMATTR Value V=-delay((V(in)),0.00005)
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SYMBOL diode 3904 144 R270
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WINDOW 0 32 32 VTop 2
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WINDOW 3 0 32 VBottom 2
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SYMATTR InstName D1
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SYMBOL res 3072 320 R180
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WINDOW 0 36 76 Left 2
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WINDOW 3 36 40 Left 2
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SYMATTR InstName R4
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SYMATTR Value 120
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SYMBOL res 3920 112 R90
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WINDOW 0 0 56 VBottom 2
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WINDOW 3 32 56 VTop 2
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SYMATTR InstName R2
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SYMATTR Value 470
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SYMBOL res 3072 400 R180
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WINDOW 0 36 76 Left 2
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WINDOW 3 36 40 Left 2
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SYMATTR InstName R3
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SYMATTR Value 390
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SYMBOL voltage 3200 672 R0
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SYMATTR InstName V4
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SYMATTR Value PULSE(0 5 0 0 0 0.1m 0.2m)
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SYMATTR SpiceLine Rser=1
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SYMBOL Opamps/opamp2 3744 64 R0
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SYMATTR InstName U1
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SYMATTR Value lm358
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SYMBOL bv 4112 288 R0
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SYMATTR InstName B3
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SYMATTR Value V=V(A) - V(B)
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SYMBOL voltage 2144 656 R0
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SYMATTR InstName V6
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SYMATTR Value PULSE(3.3 0 0 10n 10n 0.05m 0.1m)
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SYMATTR SpiceLine Rser=0
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TEXT 1664 -48 Left 2 !.tran 0 2mS
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TEXT 2480 -48 Left 2 !K1 L1 L2 0.5
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TEXT 3856 -56 Left 2 !.include LM358.lib
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