mirror of
https://github.com/rene-dev/stmbl.git
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122 lines
2.6 KiB
C
122 lines
2.6 KiB
C
#pragma once
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#include <stdint.h>
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#if __GNUC__ < 5
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#error gcc to old (< 5.0)
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#endif
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//#define TROLLER
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#define STATIC_ASSERT(COND, MSG) extern char MSG[(COND)?1:-1]
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#define DATABAUD 2000000 //baudrate used for communication
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//fixed point calculations
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#define TOFIXED(a) ((int16_t)((a) * 64))
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#define TOFLOAT(a) ((float)((a) / 64.0))
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#define TOSFLOAT(a) (ABS(a) >= 4.0) ? (((int16_t)((a) * 64)) | 0x4000) : (((int16_t)((a) * 4096.0)) & 0xBFFFF)
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#define TOFLOATS(a) ((a) & 0x4000) ? ((float)(((a) & 0xBFFFF) / 64.0)) : ((float)(((a) & 0xBFFFF) / 4096.0))
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#define CLAMP(x, low, high) (((x) > (high)) ? (high) : (((x) < (low)) ? (low) : (x)))
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#define PWM_RES 2400
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typedef struct{
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uint8_t start; // 255
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uint8_t key;
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} packet_header_t;
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//data from f1 to f4
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#pragma pack(1)
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typedef struct{
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int16_t dc_cur;
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int16_t dc_volt;
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int16_t hv_temp;
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uint8_t high_volt : 1;//hardware hi limit
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uint8_t low_volt : 1;//hardware low limit
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uint8_t over_cur : 1;//hardware cur limit
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uint8_t over_temp : 1;//hardware temp limit
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uint8_t hv_fault : 1;//iramx fault
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uint8_t sys_fault : 1;//sys fault, crc error, clock error, watchdog bit, startup failure...
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uint8_t padding : 2;
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#ifdef TROLLER
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int16_t a;
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int16_t b;
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int16_t c;
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#endif
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} from_hv_t;
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//data from f4 to f1
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#pragma pack(1)
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typedef struct{
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int16_t a;
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int16_t b;
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uint8_t mode : 4;
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uint8_t enable : 1;
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uint8_t padding : 3;
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} to_hv_t;
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typedef struct{
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packet_header_t head;
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to_hv_t data;
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} packet_to_hv_t;
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typedef struct{
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packet_header_t head;
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from_hv_t data;
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} packet_from_hv_t;
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void buff_packet(packet_header_t* p, uint8_t size);
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void unbuff_packet(packet_header_t* p, uint8_t size);
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//check if structs can be send at 5kHz using DATABAUD
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STATIC_ASSERT(sizeof(to_hv_t) <= DATABAUD / 11 / 5000 - 1 - 5, to_hv_struct_to_large);
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STATIC_ASSERT(sizeof(from_hv_t) <= DATABAUD / 11 / 5000 - 1 - 5, from_hv_struct_to_large);
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// struct f1tof4{
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// int16 a;
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// int16 b;
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// int16 udc;
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// int16 value;
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// struct {
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// bool enabled;
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// bool temp_limit;
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// bool current_limit;
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// bool watchdog; // toggle
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// int4 misc;
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// }flags;
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// int8 crc;
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// };
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//
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// struct f4tof1{
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// int16 a; // u/i
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// int16 b; // u/i
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// int16 value;
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// int6 address;
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// /*
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// rw:
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// r
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// l
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// max_i
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// max_temp
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// max_pwm
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// phase_offset_uv
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// phase_offset_vw
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// svm_mode (centered, svm, bottom low)
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// u/i cmd mode
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// u/i fb mode
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//
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// r:
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// temp0
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// temp1
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// temp2
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// temp3
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// hw version
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// */
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// bool enable;
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// bool watchdog; // toggle in hal
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// int8 crc;
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// };
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