mirror of https://github.com/rene-dev/stmbl.git
494 lines
24 KiB
C
494 lines
24 KiB
C
/**
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******************************************************************************
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* @file stm32f4xx_flash.h
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* @author MCD Application Team
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* @version V1.6.0
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* @date 10-July-2015
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* @brief This file contains all the functions prototypes for the FLASH
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* firmware library.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4xx_FLASH_H
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#define __STM32F4xx_FLASH_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx.h"
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/** @addtogroup STM32F4xx_StdPeriph_Driver
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* @{
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*/
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/** @addtogroup FLASH
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief FLASH Status
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*/
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typedef enum
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{
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FLASH_BUSY = 1,
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FLASH_ERROR_RD,
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FLASH_ERROR_PGS,
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FLASH_ERROR_PGP,
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FLASH_ERROR_PGA,
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FLASH_ERROR_WRP,
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FLASH_ERROR_PROGRAM,
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FLASH_ERROR_OPERATION,
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FLASH_COMPLETE
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}FLASH_Status;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup FLASH_Exported_Constants
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* @{
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*/
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/** @defgroup Flash_Latency
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* @{
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*/
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#define FLASH_Latency_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */
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#define FLASH_Latency_1 ((uint8_t)0x0001) /*!< FLASH One Latency cycle */
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#define FLASH_Latency_2 ((uint8_t)0x0002) /*!< FLASH Two Latency cycles */
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#define FLASH_Latency_3 ((uint8_t)0x0003) /*!< FLASH Three Latency cycles */
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#define FLASH_Latency_4 ((uint8_t)0x0004) /*!< FLASH Four Latency cycles */
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#define FLASH_Latency_5 ((uint8_t)0x0005) /*!< FLASH Five Latency cycles */
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#define FLASH_Latency_6 ((uint8_t)0x0006) /*!< FLASH Six Latency cycles */
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#define FLASH_Latency_7 ((uint8_t)0x0007) /*!< FLASH Seven Latency cycles */
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#define FLASH_Latency_8 ((uint8_t)0x0008) /*!< FLASH Eight Latency cycles */
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#define FLASH_Latency_9 ((uint8_t)0x0009) /*!< FLASH Nine Latency cycles */
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#define FLASH_Latency_10 ((uint8_t)0x000A) /*!< FLASH Ten Latency cycles */
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#define FLASH_Latency_11 ((uint8_t)0x000B) /*!< FLASH Eleven Latency cycles */
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#define FLASH_Latency_12 ((uint8_t)0x000C) /*!< FLASH Twelve Latency cycles */
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#define FLASH_Latency_13 ((uint8_t)0x000D) /*!< FLASH Thirteen Latency cycles */
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#define FLASH_Latency_14 ((uint8_t)0x000E) /*!< FLASH Fourteen Latency cycles */
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#define FLASH_Latency_15 ((uint8_t)0x000F) /*!< FLASH Fifteen Latency cycles */
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#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
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((LATENCY) == FLASH_Latency_1) || \
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((LATENCY) == FLASH_Latency_2) || \
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((LATENCY) == FLASH_Latency_3) || \
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((LATENCY) == FLASH_Latency_4) || \
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((LATENCY) == FLASH_Latency_5) || \
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((LATENCY) == FLASH_Latency_6) || \
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((LATENCY) == FLASH_Latency_7) || \
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((LATENCY) == FLASH_Latency_8) || \
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((LATENCY) == FLASH_Latency_9) || \
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((LATENCY) == FLASH_Latency_10) || \
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((LATENCY) == FLASH_Latency_11) || \
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((LATENCY) == FLASH_Latency_12) || \
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((LATENCY) == FLASH_Latency_13) || \
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((LATENCY) == FLASH_Latency_14) || \
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((LATENCY) == FLASH_Latency_15))
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/**
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* @}
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*/
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/** @defgroup FLASH_Voltage_Range
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* @{
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*/
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#define VoltageRange_1 ((uint8_t)0x00) /*!< Device operating range: 1.8V to 2.1V */
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#define VoltageRange_2 ((uint8_t)0x01) /*!<Device operating range: 2.1V to 2.7V */
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#define VoltageRange_3 ((uint8_t)0x02) /*!<Device operating range: 2.7V to 3.6V */
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#define VoltageRange_4 ((uint8_t)0x03) /*!<Device operating range: 2.7V to 3.6V + External Vpp */
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#define IS_VOLTAGERANGE(RANGE)(((RANGE) == VoltageRange_1) || \
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((RANGE) == VoltageRange_2) || \
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((RANGE) == VoltageRange_3) || \
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((RANGE) == VoltageRange_4))
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/**
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* @}
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*/
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/** @defgroup FLASH_Sectors
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* @{
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*/
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#define FLASH_Sector_0 ((uint16_t)0x0000) /*!< Sector Number 0 */
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#define FLASH_Sector_1 ((uint16_t)0x0008) /*!< Sector Number 1 */
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#define FLASH_Sector_2 ((uint16_t)0x0010) /*!< Sector Number 2 */
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#define FLASH_Sector_3 ((uint16_t)0x0018) /*!< Sector Number 3 */
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#define FLASH_Sector_4 ((uint16_t)0x0020) /*!< Sector Number 4 */
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#define FLASH_Sector_5 ((uint16_t)0x0028) /*!< Sector Number 5 */
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#define FLASH_Sector_6 ((uint16_t)0x0030) /*!< Sector Number 6 */
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#define FLASH_Sector_7 ((uint16_t)0x0038) /*!< Sector Number 7 */
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#define FLASH_Sector_8 ((uint16_t)0x0040) /*!< Sector Number 8 */
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#define FLASH_Sector_9 ((uint16_t)0x0048) /*!< Sector Number 9 */
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#define FLASH_Sector_10 ((uint16_t)0x0050) /*!< Sector Number 10 */
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#define FLASH_Sector_11 ((uint16_t)0x0058) /*!< Sector Number 11 */
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#define FLASH_Sector_12 ((uint16_t)0x0080) /*!< Sector Number 12 */
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#define FLASH_Sector_13 ((uint16_t)0x0088) /*!< Sector Number 13 */
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#define FLASH_Sector_14 ((uint16_t)0x0090) /*!< Sector Number 14 */
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#define FLASH_Sector_15 ((uint16_t)0x0098) /*!< Sector Number 15 */
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#define FLASH_Sector_16 ((uint16_t)0x00A0) /*!< Sector Number 16 */
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#define FLASH_Sector_17 ((uint16_t)0x00A8) /*!< Sector Number 17 */
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#define FLASH_Sector_18 ((uint16_t)0x00B0) /*!< Sector Number 18 */
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#define FLASH_Sector_19 ((uint16_t)0x00B8) /*!< Sector Number 19 */
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#define FLASH_Sector_20 ((uint16_t)0x00C0) /*!< Sector Number 20 */
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#define FLASH_Sector_21 ((uint16_t)0x00C8) /*!< Sector Number 21 */
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#define FLASH_Sector_22 ((uint16_t)0x00D0) /*!< Sector Number 22 */
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#define FLASH_Sector_23 ((uint16_t)0x00D8) /*!< Sector Number 23 */
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#define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_Sector_0) || ((SECTOR) == FLASH_Sector_1) ||\
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((SECTOR) == FLASH_Sector_2) || ((SECTOR) == FLASH_Sector_3) ||\
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((SECTOR) == FLASH_Sector_4) || ((SECTOR) == FLASH_Sector_5) ||\
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((SECTOR) == FLASH_Sector_6) || ((SECTOR) == FLASH_Sector_7) ||\
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((SECTOR) == FLASH_Sector_8) || ((SECTOR) == FLASH_Sector_9) ||\
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((SECTOR) == FLASH_Sector_10) || ((SECTOR) == FLASH_Sector_11) ||\
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((SECTOR) == FLASH_Sector_12) || ((SECTOR) == FLASH_Sector_13) ||\
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((SECTOR) == FLASH_Sector_14) || ((SECTOR) == FLASH_Sector_15) ||\
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((SECTOR) == FLASH_Sector_16) || ((SECTOR) == FLASH_Sector_17) ||\
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((SECTOR) == FLASH_Sector_18) || ((SECTOR) == FLASH_Sector_19) ||\
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((SECTOR) == FLASH_Sector_20) || ((SECTOR) == FLASH_Sector_21) ||\
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((SECTOR) == FLASH_Sector_22) || ((SECTOR) == FLASH_Sector_23))
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#if defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F469_479xx)
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#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x081FFFFF)) ||\
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(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
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#endif /* STM32F427_437xx || STM32F429_439xx || STM32F469_479xx */
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#if defined (STM32F40_41xxx)
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#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x080FFFFF)) ||\
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(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
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#endif /* STM32F40_41xxx */
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#if defined (STM32F401xx)
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#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0803FFFF)) ||\
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(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
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#endif /* STM32F401xx */
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#if defined (STM32F411xE) || defined (STM32F446xx)
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#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0807FFFF)) ||\
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(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
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#endif /* STM32F411xE || STM32F446xx */
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#if defined (STM32F410xx)
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#define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0801FFFF)) ||\
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(((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
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#endif /* STM32F410xx */
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/**
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* @}
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*/
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/** @defgroup Option_Bytes_Write_Protection
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* @{
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*/
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#define OB_WRP_Sector_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
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#define OB_WRP_Sector_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
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#define OB_WRP_Sector_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
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#define OB_WRP_Sector_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
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#define OB_WRP_Sector_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
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#define OB_WRP_Sector_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
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#define OB_WRP_Sector_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
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#define OB_WRP_Sector_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
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#define OB_WRP_Sector_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */
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#define OB_WRP_Sector_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */
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#define OB_WRP_Sector_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */
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#define OB_WRP_Sector_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */
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#define OB_WRP_Sector_12 ((uint32_t)0x00000001) /*!< Write protection of Sector12 */
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#define OB_WRP_Sector_13 ((uint32_t)0x00000002) /*!< Write protection of Sector13 */
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#define OB_WRP_Sector_14 ((uint32_t)0x00000004) /*!< Write protection of Sector14 */
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#define OB_WRP_Sector_15 ((uint32_t)0x00000008) /*!< Write protection of Sector15 */
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#define OB_WRP_Sector_16 ((uint32_t)0x00000010) /*!< Write protection of Sector16 */
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#define OB_WRP_Sector_17 ((uint32_t)0x00000020) /*!< Write protection of Sector17 */
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#define OB_WRP_Sector_18 ((uint32_t)0x00000040) /*!< Write protection of Sector18 */
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#define OB_WRP_Sector_19 ((uint32_t)0x00000080) /*!< Write protection of Sector19 */
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#define OB_WRP_Sector_20 ((uint32_t)0x00000100) /*!< Write protection of Sector20 */
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#define OB_WRP_Sector_21 ((uint32_t)0x00000200) /*!< Write protection of Sector21 */
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#define OB_WRP_Sector_22 ((uint32_t)0x00000400) /*!< Write protection of Sector22 */
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#define OB_WRP_Sector_23 ((uint32_t)0x00000800) /*!< Write protection of Sector23 */
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#define OB_WRP_Sector_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
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#define IS_OB_WRP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
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/**
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* @}
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*/
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/** @defgroup Selection_Protection_Mode
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* @{
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*/
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#define OB_PcROP_Disable ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */
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#define OB_PcROP_Enable ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */
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#define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PcROP_Disable) || ((PCROP) == OB_PcROP_Enable))
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/**
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* @}
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*/
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/** @defgroup Option_Bytes_PC_ReadWrite_Protection
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* @{
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*/
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#define OB_PCROP_Sector_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */
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#define OB_PCROP_Sector_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */
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#define OB_PCROP_Sector_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */
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#define OB_PCROP_Sector_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */
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#define OB_PCROP_Sector_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */
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#define OB_PCROP_Sector_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */
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#define OB_PCROP_Sector_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */
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#define OB_PCROP_Sector_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */
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#define OB_PCROP_Sector_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */
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#define OB_PCROP_Sector_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */
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#define OB_PCROP_Sector_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */
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#define OB_PCROP_Sector_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */
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#define OB_PCROP_Sector_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */
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#define OB_PCROP_Sector_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */
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#define OB_PCROP_Sector_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */
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#define OB_PCROP_Sector_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */
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#define OB_PCROP_Sector_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */
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#define OB_PCROP_Sector_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */
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#define OB_PCROP_Sector_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */
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#define OB_PCROP_Sector_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */
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#define OB_PCROP_Sector_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */
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#define OB_PCROP_Sector_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */
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#define OB_PCROP_Sector_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */
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#define OB_PCROP_Sector_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */
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#define OB_PCROP_Sector_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */
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#define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_Read_Protection
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* @{
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*/
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#define OB_RDP_Level_0 ((uint8_t)0xAA)
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#define OB_RDP_Level_1 ((uint8_t)0x55)
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/*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2
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it's no more possible to go back to level 1 or 0 */
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#define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\
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((LEVEL) == OB_RDP_Level_1))/*||\
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((LEVEL) == OB_RDP_Level_2))*/
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_IWatchdog
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* @{
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*/
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#define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */
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#define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */
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#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_nRST_STOP
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* @{
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*/
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#define OB_STOP_NoRST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */
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#define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
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#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST))
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/**
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* @}
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*/
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/** @defgroup FLASH_Option_Bytes_nRST_STDBY
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* @{
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*/
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#define OB_STDBY_NoRST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */
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#define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
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#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
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/**
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* @}
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*/
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/** @defgroup FLASH_BOR_Reset_Level
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* @{
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*/
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#define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */
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#define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */
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#define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */
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#define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */
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#define IS_OB_BOR(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\
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((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
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/**
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* @}
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*/
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/** @defgroup FLASH_Dual_Boot
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* @{
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*/
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#define OB_Dual_BootEnabled ((uint8_t)0x10) /*!< Dual Bank Boot Enable */
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#define OB_Dual_BootDisabled ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */
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#define IS_OB_BOOT(BOOT) (((BOOT) == OB_Dual_BootEnabled) || ((BOOT) == OB_Dual_BootDisabled))
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/**
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* @}
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*/
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/** @defgroup FLASH_Interrupts
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* @{
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*/
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#define FLASH_IT_EOP ((uint32_t)0x01000000) /*!< End of FLASH Operation Interrupt source */
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#define FLASH_IT_ERR ((uint32_t)0x02000000) /*!< Error Interrupt source */
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#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFCFFFFFF) == 0x00000000) && ((IT) != 0x00000000))
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/**
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* @}
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*/
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/** @defgroup FLASH_Flags
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* @{
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*/
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#define FLASH_FLAG_EOP ((uint32_t)0x00000001) /*!< FLASH End of Operation flag */
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#define FLASH_FLAG_OPERR ((uint32_t)0x00000002) /*!< FLASH operation Error flag */
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#define FLASH_FLAG_WRPERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */
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#define FLASH_FLAG_PGAERR ((uint32_t)0x00000020) /*!< FLASH Programming Alignment error flag */
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#define FLASH_FLAG_PGPERR ((uint32_t)0x00000040) /*!< FLASH Programming Parallelism error flag */
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#define FLASH_FLAG_PGSERR ((uint32_t)0x00000080) /*!< FLASH Programming Sequence error flag */
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#define FLASH_FLAG_RDERR ((uint32_t)0x00000100) /*!< Read Protection error flag (PCROP) */
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#define FLASH_FLAG_BSY ((uint32_t)0x00010000) /*!< FLASH Busy flag */
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#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFE0C) == 0x00000000) && ((FLAG) != 0x00000000))
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#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_EOP) || ((FLAG) == FLASH_FLAG_OPERR) || \
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((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_PGAERR) || \
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((FLAG) == FLASH_FLAG_PGPERR) || ((FLAG) == FLASH_FLAG_PGSERR) || \
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((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_RDERR))
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/**
|
|
* @}
|
|
*/
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|
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/** @defgroup FLASH_Program_Parallelism
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|
* @{
|
|
*/
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|
#define FLASH_PSIZE_BYTE ((uint32_t)0x00000000)
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#define FLASH_PSIZE_HALF_WORD ((uint32_t)0x00000100)
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#define FLASH_PSIZE_WORD ((uint32_t)0x00000200)
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#define FLASH_PSIZE_DOUBLE_WORD ((uint32_t)0x00000300)
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|
#define CR_PSIZE_MASK ((uint32_t)0xFFFFFCFF)
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup FLASH_Keys
|
|
* @{
|
|
*/
|
|
#define RDP_KEY ((uint16_t)0x00A5)
|
|
#define FLASH_KEY1 ((uint32_t)0x45670123)
|
|
#define FLASH_KEY2 ((uint32_t)0xCDEF89AB)
|
|
#define FLASH_OPT_KEY1 ((uint32_t)0x08192A3B)
|
|
#define FLASH_OPT_KEY2 ((uint32_t)0x4C5D6E7F)
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @brief ACR register byte 0 (Bits[7:0]) base address
|
|
*/
|
|
#define ACR_BYTE0_ADDRESS ((uint32_t)0x40023C00)
|
|
/**
|
|
* @brief OPTCR register byte 0 (Bits[7:0]) base address
|
|
*/
|
|
#define OPTCR_BYTE0_ADDRESS ((uint32_t)0x40023C14)
|
|
/**
|
|
* @brief OPTCR register byte 1 (Bits[15:8]) base address
|
|
*/
|
|
#define OPTCR_BYTE1_ADDRESS ((uint32_t)0x40023C15)
|
|
/**
|
|
* @brief OPTCR register byte 2 (Bits[23:16]) base address
|
|
*/
|
|
#define OPTCR_BYTE2_ADDRESS ((uint32_t)0x40023C16)
|
|
/**
|
|
* @brief OPTCR register byte 3 (Bits[31:24]) base address
|
|
*/
|
|
#define OPTCR_BYTE3_ADDRESS ((uint32_t)0x40023C17)
|
|
|
|
/**
|
|
* @brief OPTCR1 register byte 0 (Bits[7:0]) base address
|
|
*/
|
|
#define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A)
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Exported macro ------------------------------------------------------------*/
|
|
/* Exported functions --------------------------------------------------------*/
|
|
|
|
/* FLASH Interface configuration functions ************************************/
|
|
void FLASH_SetLatency(uint32_t FLASH_Latency);
|
|
void FLASH_PrefetchBufferCmd(FunctionalState NewState);
|
|
void FLASH_InstructionCacheCmd(FunctionalState NewState);
|
|
void FLASH_DataCacheCmd(FunctionalState NewState);
|
|
void FLASH_InstructionCacheReset(void);
|
|
void FLASH_DataCacheReset(void);
|
|
|
|
/* FLASH Memory Programming functions *****************************************/
|
|
void FLASH_Unlock(void);
|
|
void FLASH_Lock(void);
|
|
FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange);
|
|
FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange);
|
|
FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange);
|
|
FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange);
|
|
FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data);
|
|
FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
|
|
FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
|
|
FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data);
|
|
|
|
/* Option Bytes Programming functions *****************************************/
|
|
void FLASH_OB_Unlock(void);
|
|
void FLASH_OB_Lock(void);
|
|
void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState);
|
|
void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState);
|
|
void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP);
|
|
void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState);
|
|
void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState);
|
|
void FLASH_OB_RDPConfig(uint8_t OB_RDP);
|
|
void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY);
|
|
void FLASH_OB_BORConfig(uint8_t OB_BOR);
|
|
void FLASH_OB_BootConfig(uint8_t OB_BOOT);
|
|
FLASH_Status FLASH_OB_Launch(void);
|
|
uint8_t FLASH_OB_GetUser(void);
|
|
uint16_t FLASH_OB_GetWRP(void);
|
|
uint16_t FLASH_OB_GetWRP1(void);
|
|
uint16_t FLASH_OB_GetPCROP(void);
|
|
uint16_t FLASH_OB_GetPCROP1(void);
|
|
FlagStatus FLASH_OB_GetRDP(void);
|
|
uint8_t FLASH_OB_GetBOR(void);
|
|
|
|
/* Interrupts and flags management functions **********************************/
|
|
void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
|
|
FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
|
|
void FLASH_ClearFlag(uint32_t FLASH_FLAG);
|
|
FLASH_Status FLASH_GetStatus(void);
|
|
FLASH_Status FLASH_WaitForLastOperation(void);
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* __STM32F4xx_FLASH_H */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|