stmbl/hw/kicad/11ua/11ua.kicad_pcb

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(kicad_pcb (version 20170123) (host pcbnew "(2017-04-22 revision b385413)-master")
(general
(links 38)
(no_connects 38)
(area 119.554999 67.1425 171.595001 85.365001)
(thickness 1.6)
(drawings 0)
(tracks 102)
(zones 0)
(modules 17)
(nets 15)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.25)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.8)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.2)
(aux_axis_origin 0 0)
(visible_elements FFF9FF7F)
(pcbplotparams
(layerselection 0x00030_ffffffff)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 "Net-(C1-Pad2)")
(net 2 "Net-(C1-Pad1)")
(net 3 "Net-(C2-Pad1)")
(net 4 "Net-(C2-Pad2)")
(net 5 "Net-(C3-Pad1)")
(net 6 "Net-(C3-Pad2)")
(net 7 "Net-(C4-Pad2)")
(net 8 "Net-(C4-Pad1)")
(net 9 GND)
(net 10 +5V)
(net 11 "Net-(J1-Pad5)")
(net 12 "Net-(J1-Pad4)")
(net 13 "Net-(J2-Pad4)")
(net 14 "Net-(J2-Pad5)")
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +5V)
(add_net GND)
(add_net "Net-(C1-Pad1)")
(add_net "Net-(C1-Pad2)")
(add_net "Net-(C2-Pad1)")
(add_net "Net-(C2-Pad2)")
(add_net "Net-(C3-Pad1)")
(add_net "Net-(C3-Pad2)")
(add_net "Net-(C4-Pad1)")
(add_net "Net-(C4-Pad2)")
(add_net "Net-(J1-Pad4)")
(add_net "Net-(J1-Pad5)")
(add_net "Net-(J2-Pad4)")
(add_net "Net-(J2-Pad5)")
)
(module stmbl:C_0603 (layer F.Cu) (tedit 58865B58) (tstamp 592E3406)
(at 147 71)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /592E0C46)
(attr smd)
(fp_text reference C1 (at -3.248 0.064) (layer F.SilkS)
(effects (font (size 0.8 0.8) (thickness 0.2)))
)
(fp_text value 27p (at 0 1.4) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0.5 -0.4) (end 0.5 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.5 -0.4) (end -0.5 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -1.3 -0.6) (end 1.3 -0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 0.6) (end 1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -0.6) (end -1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.3 -0.6) (end 1.3 0.6) (layer F.CrtYd) (width 0.05))
(pad 2 smd rect (at 0.75 0) (size 0.59 0.8) (layers F.Cu F.Paste F.Mask)
(net 1 "Net-(C1-Pad2)") (solder_mask_margin 0.1))
(pad 1 smd rect (at -0.75 0) (size 0.59 0.8) (layers F.Cu F.Paste F.Mask)
(net 2 "Net-(C1-Pad1)") (solder_mask_margin 0.1))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module stmbl:C_0603 (layer F.Cu) (tedit 58865B58) (tstamp 592E3416)
(at 145.5 80)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /592E0E05)
(attr smd)
(fp_text reference C2 (at -3.248 0.064) (layer F.SilkS)
(effects (font (size 0.8 0.8) (thickness 0.2)))
)
(fp_text value 27p (at 0 1.4) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.3 -0.6) (end 1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -0.6) (end -1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 0.6) (end 1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -0.6) (end 1.3 -0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.5 -0.4) (end -0.5 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.5 -0.4) (end 0.5 0.4) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -0.75 0) (size 0.59 0.8) (layers F.Cu F.Paste F.Mask)
(net 3 "Net-(C2-Pad1)") (solder_mask_margin 0.1))
(pad 2 smd rect (at 0.75 0) (size 0.59 0.8) (layers F.Cu F.Paste F.Mask)
(net 4 "Net-(C2-Pad2)") (solder_mask_margin 0.1))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module stmbl:C_0603 (layer F.Cu) (tedit 58865B58) (tstamp 592E3426)
(at 148.25 80 180)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /592E0986)
(attr smd)
(fp_text reference C3 (at -3.248 0.064 180) (layer F.SilkS)
(effects (font (size 0.8 0.8) (thickness 0.2)))
)
(fp_text value 27p (at 0 1.4 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.3 -0.6) (end 1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -0.6) (end -1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 0.6) (end 1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -0.6) (end 1.3 -0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.5 -0.4) (end -0.5 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.5 -0.4) (end 0.5 0.4) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -0.75 0 180) (size 0.59 0.8) (layers F.Cu F.Paste F.Mask)
(net 5 "Net-(C3-Pad1)") (solder_mask_margin 0.1))
(pad 2 smd rect (at 0.75 0 180) (size 0.59 0.8) (layers F.Cu F.Paste F.Mask)
(net 6 "Net-(C3-Pad2)") (solder_mask_margin 0.1))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module stmbl:C_0603 (layer F.Cu) (tedit 58865B58) (tstamp 592E3436)
(at 149.75 71 180)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /592E0942)
(attr smd)
(fp_text reference C4 (at -3.248 0.064 180) (layer F.SilkS)
(effects (font (size 0.8 0.8) (thickness 0.2)))
)
(fp_text value 27p (at 0 1.4 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0.5 -0.4) (end 0.5 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.5 -0.4) (end -0.5 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -1.3 -0.6) (end 1.3 -0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 0.6) (end 1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -0.6) (end -1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.3 -0.6) (end 1.3 0.6) (layer F.CrtYd) (width 0.05))
(pad 2 smd rect (at 0.75 0 180) (size 0.59 0.8) (layers F.Cu F.Paste F.Mask)
(net 7 "Net-(C4-Pad2)") (solder_mask_margin 0.1))
(pad 1 smd rect (at -0.75 0 180) (size 0.59 0.8) (layers F.Cu F.Paste F.Mask)
(net 8 "Net-(C4-Pad1)") (solder_mask_margin 0.1))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module stmbl:C_0603 (layer F.Cu) (tedit 58865B58) (tstamp 592E3446)
(at 144 71.75 90)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /592E10E2)
(attr smd)
(fp_text reference C5 (at -3.248 0.064 90) (layer F.SilkS)
(effects (font (size 0.8 0.8) (thickness 0.2)))
)
(fp_text value 100n (at 0 1.4 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 0.5 -0.4) (end 0.5 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.5 -0.4) (end -0.5 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -1.3 -0.6) (end 1.3 -0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 0.6) (end 1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -0.6) (end -1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.3 -0.6) (end 1.3 0.6) (layer F.CrtYd) (width 0.05))
(pad 2 smd rect (at 0.75 0 90) (size 0.59 0.8) (layers F.Cu F.Paste F.Mask)
(net 2 "Net-(C1-Pad1)") (solder_mask_margin 0.1))
(pad 1 smd rect (at -0.75 0 90) (size 0.59 0.8) (layers F.Cu F.Paste F.Mask)
(net 9 GND) (solder_mask_margin 0.1))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module stmbl:C_0603 (layer F.Cu) (tedit 58865B58) (tstamp 592E3456)
(at 143.5 80.75 270)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(path /592E1BDE)
(attr smd)
(fp_text reference C6 (at -3.248 0.064 270) (layer F.SilkS)
(effects (font (size 0.8 0.8) (thickness 0.2)))
)
(fp_text value 100n (at 0 1.4 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.3 -0.6) (end 1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -0.6) (end -1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 0.6) (end 1.3 0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.3 -0.6) (end 1.3 -0.6) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.8 0.4) (end 0.8 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer F.SilkS) (width 0.15))
(fp_line (start -0.5 -0.4) (end -0.5 0.4) (layer F.SilkS) (width 0.15))
(fp_line (start 0.5 -0.4) (end 0.5 0.4) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -0.75 0 270) (size 0.59 0.8) (layers F.Cu F.Paste F.Mask)
(net 9 GND) (solder_mask_margin 0.1))
(pad 2 smd rect (at 0.75 0 270) (size 0.59 0.8) (layers F.Cu F.Paste F.Mask)
(net 3 "Net-(C2-Pad1)") (solder_mask_margin 0.1))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Connect:RJ45_8 (layer F.Cu) (tedit 0) (tstamp 592E346E)
(at 134.25 72.67 270)
(tags RJ45)
(path /592E009D)
(fp_text reference J1 (at 4.7 11.18 270) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value RJ45 (at 4.59 6.25 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 12.46 14.47) (end -3.56 14.47) (layer F.CrtYd) (width 0.05))
(fp_line (start 12.46 14.47) (end 12.46 -4.06) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.56 -4.06) (end -3.56 14.47) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.56 -4.06) (end 12.46 -4.06) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.17 7.51) (end -3.17 14.22) (layer F.SilkS) (width 0.12))
(fp_line (start 12.06 7.52) (end 12.07 14.22) (layer F.SilkS) (width 0.12))
(fp_line (start -3.17 -3.81) (end -3.17 5.19) (layer F.SilkS) (width 0.12))
(fp_line (start 12.07 -3.81) (end -3.17 -3.81) (layer F.SilkS) (width 0.12))
(fp_line (start 12.07 -3.81) (end 12.06 5.18) (layer F.SilkS) (width 0.12))
(fp_line (start -3.17 14.22) (end 12.07 14.22) (layer F.SilkS) (width 0.12))
(pad 8 thru_hole circle (at 8.89 -2.54 270) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 9 GND))
(pad 7 thru_hole circle (at 7.62 0 270) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 10 +5V))
(pad 6 thru_hole circle (at 6.35 -2.54 270) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 4 "Net-(C2-Pad2)"))
(pad 5 thru_hole circle (at 5.08 0 270) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 11 "Net-(J1-Pad5)"))
(pad 4 thru_hole circle (at 3.81 -2.54 270) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 12 "Net-(J1-Pad4)"))
(pad 3 thru_hole circle (at 2.54 0 270) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 6 "Net-(C3-Pad2)"))
(pad 2 thru_hole circle (at 1.27 -2.54 270) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 1 "Net-(C1-Pad2)"))
(pad 1 thru_hole rect (at 0 0 270) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 7 "Net-(C4-Pad2)"))
(pad Hole np_thru_hole circle (at -1.49 6.35 270) (size 3.65 3.65) (drill 3.25) (layers *.Cu *.SilkS *.Mask))
(pad Hole np_thru_hole circle (at 10.38 6.35 270) (size 3.65 3.65) (drill 3.25) (layers *.Cu *.SilkS *.Mask))
(model Connectors.3dshapes/RJ45_8.wrl
(at (xyz 0.18 -0.25 0))
(scale (xyz 0.4 0.4 0.4))
(rotate (xyz 0 0 0))
)
)
(module Connect:RJ45_8 (layer F.Cu) (tedit 0) (tstamp 592E3486)
(at 156.9 81.58 90)
(tags RJ45)
(path /592E00E5)
(fp_text reference J2 (at 4.7 11.18 90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value RJ45 (at 4.59 6.25 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -3.17 14.22) (end 12.07 14.22) (layer F.SilkS) (width 0.12))
(fp_line (start 12.07 -3.81) (end 12.06 5.18) (layer F.SilkS) (width 0.12))
(fp_line (start 12.07 -3.81) (end -3.17 -3.81) (layer F.SilkS) (width 0.12))
(fp_line (start -3.17 -3.81) (end -3.17 5.19) (layer F.SilkS) (width 0.12))
(fp_line (start 12.06 7.52) (end 12.07 14.22) (layer F.SilkS) (width 0.12))
(fp_line (start -3.17 7.51) (end -3.17 14.22) (layer F.SilkS) (width 0.12))
(fp_line (start -3.56 -4.06) (end 12.46 -4.06) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.56 -4.06) (end -3.56 14.47) (layer F.CrtYd) (width 0.05))
(fp_line (start 12.46 14.47) (end 12.46 -4.06) (layer F.CrtYd) (width 0.05))
(fp_line (start 12.46 14.47) (end -3.56 14.47) (layer F.CrtYd) (width 0.05))
(pad Hole np_thru_hole circle (at 10.38 6.35 90) (size 3.65 3.65) (drill 3.25) (layers *.Cu *.SilkS *.Mask))
(pad Hole np_thru_hole circle (at -1.49 6.35 90) (size 3.65 3.65) (drill 3.25) (layers *.Cu *.SilkS *.Mask))
(pad 1 thru_hole rect (at 0 0 90) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 8 "Net-(C4-Pad1)"))
(pad 2 thru_hole circle (at 1.27 -2.54 90) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 2 "Net-(C1-Pad1)"))
(pad 3 thru_hole circle (at 2.54 0 90) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 5 "Net-(C3-Pad1)"))
(pad 4 thru_hole circle (at 3.81 -2.54 90) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 13 "Net-(J2-Pad4)"))
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(net 14 "Net-(J2-Pad5)"))
(pad 6 thru_hole circle (at 6.35 -2.54 90) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 3 "Net-(C2-Pad1)"))
(pad 7 thru_hole circle (at 7.62 0 90) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 10 +5V))
(pad 8 thru_hole circle (at 8.89 -2.54 90) (size 1.5 1.5) (drill 0.9) (layers *.Cu *.Mask)
(net 9 GND))
(model Connectors.3dshapes/RJ45_8.wrl
(at (xyz 0.18 -0.25 0))
(scale (xyz 0.4 0.4 0.4))
(rotate (xyz 0 0 0))
)
)
(module stmbl:R_0603 (layer F.Cu) (tedit 58865CE9) (tstamp 592E3496)
(at 147 69.5)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /592E0C0B)
(attr smd)
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(model Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module stmbl:R_0603 (layer F.Cu) (tedit 58865CE9) (tstamp 592E34A6)
(at 145.5 81.5)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /592E0DC4)
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(model Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module stmbl:R_0603 (layer F.Cu) (tedit 58865CE9) (tstamp 592E34B6)
(at 149.75 69.5 180)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /592E08D0)
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(model Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module stmbl:R_0603 (layer F.Cu) (tedit 58865CE9) (tstamp 592E34C6)
(at 148.25 81.5 180)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /592E0847)
(attr smd)
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(model Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module stmbl:R_0603 (layer F.Cu) (tedit 58865CE9) (tstamp 592E34D6)
(at 141 71.75 270)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /592E1018)
(attr smd)
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(model Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module stmbl:R_0603 (layer F.Cu) (tedit 58865CE9) (tstamp 592E34E6)
(at 142.5 71.75 90)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /592E1061)
(attr smd)
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(model Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module stmbl:R_0603 (layer F.Cu) (tedit 58865CE9) (tstamp 592E34F6)
(at 141 80.75 90)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /592E1BC6)
(attr smd)
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(model Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module stmbl:R_0603 (layer F.Cu) (tedit 58865CE9) (tstamp 592E3506)
(at 142.25 80.75 270)
(descr "Resistor SMD 0603, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0603")
(path /592E1BCC)
(attr smd)
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(model Resistors_SMD.3dshapes/R_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
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(at 148.25 75.5 270)
(descr "Module Narrow CMS SOJ 8 pins large")
(tags "CMS SOJ")
(path /592E0206)
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